How to “invalidate” or “flush” a range of cpu cache in powerpc architecutre?

[masoud_jafari]

I am working with an embedded device which communicates with my PowerPC CPU made by NXP (T1022) via PCIe. Due to the QorIQ SDK V2.0 constraints i have to use linux kernel version 4.1.8. This version doesn't have functions related to cache operations in $KERNEL_SOURCE/arch/powerpc/include/asm/, such as:

• "invalidate_dcache_range()"
• "flush_dcache_range()"
• "clean_dcache_range()"

(in this directory "cacheflush.h" header just contains declaration of mentioned functions.)
Also, my embedded device's SDK needs to call these functions to prepare DMA access.
Note that Kernel versions higher than 4.5 provide declaration of these functions.

Now i have some questions:

1. I can use and copy functions which are implemented in newer kernels, in my old kernel and rebuild it, but modifying the kernel source doesn't make sense, right?
2. Can you suggest some workaround or alternate method to resolve it?
3. How can i test that cache invalidated or flushed correctly? is there any way to read cache blocks in userspace?

Thanks,

[yipingwang]

Please refer to the following definition in arch/powerpc/include/asm/cacheflush.h.

extern void flush_dcache_range(unsigned long start, unsigned long stop);
#ifdef CONFIG_PPC32
extern void clean_dcache_range(unsigned long start, unsigned long stop);
extern void invalidate_dcache_range(unsigned long start, unsigned long stop);
#endif /* CONFIG_PPC32 */
#ifdef CONFIG_PPC64
extern void flush_inval_dcache_range(unsigned long start, unsigned long stop);
extern void flush_dcache_phys_range(unsigned long start, unsigned long stop);
#endif

These functions invalidate_dcache_range, flush_dcache_range and clean_dcache_range are define in arch/powerpc/kernel/misc_32.S in Linux SDK 2.0 Linux Kernel source code.

The perf tool can be used to monitor and verify correct cache behaviour - for instance, you can check cache flushing works correctly by filling the cache, flushing it, measuring cache misses on subsequent memory accesses and comparing it to your expected result

[masoud_jafari]

Thanks @Yiping 

This file which you mentioned above is for 32-bit platforms i think, does it works for T1022 which is a 64-bit CPU?

[yipingwang]

For 64 bit CPU, please refer to flush_inval_dcache_range and flush_dcache_phys_range.