Have a great day,
The T1042 supports 32-bit and 64-bit DDR data bus width. I suppose that you are going implement the 64-bit data bus so all 8 chips will be connected to the same chip select MSC0 ( or MCS1). In this case they all ought be connected to the same clock enable CKE0 if MCS0 (or CKE1 if MCS1) is used. The fly-by routing is recommended for address, command, control, and clock signal bus. You may use single differential clock pair for all 8 chips in fly-by mode. Any of the MCKE0/MCKE0 or MCKE1/MCKE1 can be used.
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