32-bit Physical Addressing in T1042D4RDB

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32-bit Physical Addressing in T1042D4RDB

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burakorcun_ozka
Contributor III

Hello,

My question is about physical addressing of T1042D4RDB. My board has 36-bit physical addressing, that means TLBs are created with 32-bit EPN and 36-bit RPN values, LAWs have 36-bit physical addressing as well.

u-boot and Linux certainly use 36-bit physical addressing on the board, but i wonder whether using 32-bit physical addressing is possible in the board.

Can i run u-boot or Linux with 32-bit physical addressing, create 32-bit EPN and 32-bit RPN TLBs for the board? Or, must all pyhsical addressing absolutely be 36-bit for the board?

Thanks in advanced.

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ufedor
NXP Employee
NXP Employee

Can i run u-boot or Linux with 32-bit physical addressing, create 32-bit EPN and 32-bit RPN TLBs for the board?

U-Boot - possible.

Linux - not.

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burakorcun_ozka
Contributor III

ufedor,


How can i use a 32-bit physical address instead of a 36-bit physical address to point really 36-bit physical address?

How can it be possible in U-Boot? Additionally, why is it impossible in Linux? Does Linux create TLBs differently than U-Boot? Or are there some constraint due to OS?

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ufedor
NXP Employee
NXP Employee

How can i use a 32-bit physical address instead of a 36-bit

> physical address to point really 36-bit physical address?

This is impossible.

How can it be possible in U-Boot?

U-Boot could work as application with 32-bit memory map.

Or are there some constraint due to OS?

32-bit Linux is not supported.

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burakorcun_ozka
Contributor III

ufedor,

The possible word means that if u-boot could run as an application, not as a bootloader. When it runs as a bootloader, 32-bit addressing is impossible like Linux. I got it.

I appreciate for your replies, one more question please :smileyhappy: The e5500 core has a MMU register called MAS7, which is used to store most significant 4 bits of a TLB's real page number. The following mention is from e5500 Core RM about MAS7:

"Since e5500 supports 36 bits of physical address, only the low-order 4 bits of the high-order 32-bits of the real address (RPN) are implemented."

Does the sentence says that e5500 core is able to used for only 36-bit physical addressing? Is using e5500 for 32-bit, 40-bit or 64-bit physical addressing impossible in a custom-designed board?

Thanks.

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ufedor
NXP Employee
NXP Employee

Does the sentence says that e5500 core is able to used for only 36-bit physical addressing?

The e5500 core supports accesses to 36-bit physical addresses.

Is using e5500 for 32-bit, 40-bit or 64-bit physical addressing impossible in a custom-designed board?

40-bit and 64-bit physical (real) addressing is not supported by the e5500 MMU hardware - refer to the e5500 Core Reference Manual, 2.16.4 MMU Configuration Register (MMUCFG), RASIZE.