power toggling mpl115a1

[mcksen]

I have implemented the MPL115A1 in a circuit.

In this implementation the MPL is supposed to be shut down between every reading, this is done by toggling VDD, and not by using the SHDN.
In the datasheet a wake-up time is indicated from SHDN, does this also apply when toggling the VDD?

 I am seeing a difference in the temperature reading when shutting the MPL down between readings.

[TomasVaverka]

Hi Mike,

I have requested assistance from the product group to provide an accurate answer. I will get back to you and update this thread as soon as I have their feedback.

Thank you for your patience.

Best regards,

Tomas

[TomasVaverka]

Hi Mike,

Unfortunately the designer of the MPL115A1 is no longer with the company, but according to the design doc there is not a timing difference. The difference is the I/O pads are enabled when VDD is applied to ensure high impedance on all pins. Otherwise, all the internal circuits are disabled in either case.

Best regards,

Tomas