FXOS8700 - sleep INT keeps repeating

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FXOS8700 - sleep INT keeps repeating

Contributor I


In my app I am trying to setup the VECM and PULSE event for auto-sleep/wake mode.

Without auto-sleep everything works fine.


When setting up auto-sleep I keep getting auto-sleep interrupts even though interrupts are being cleared by the MCU.

ACC sensor setup is:

// put device into standby mode
ACC_Write_Register( FXOS8700CQ_REG_CTRL_REG1, 0x00);
// set full scale range
// XYZ_DATA_CFG => +/-2g range with 0.244mg/LSB
ACC_Write_Register( FXOS8700CQ_REG_XYZ_DATA_CFG, 0x00);
/*! ***************** VECTOR-MOTION DETECTION ********************* */
// = 0x02B9 => 143 *0.244mg = ~35mg = ~2°, debounce reset when out of trigger
ACC_Write_Register( FXOS8700CQ_REG_A_VECM_THS_MSB, 0x80 | 0x00 );
ACC_Write_Register( FXOS8700CQ_REG_A_VECM_THS_LSB, 0xD6 );
// A_VECM_CNT debounce counter 0x07 * 1/12.5Hz = 540ms
ACC_Write_Register( FXOS8700CQ_REG_A_VECM_CNT, 0x07 )+;
// A_VECM_CFG: event latching enabled, enable acceleration vector magnitude
ACC_Write_Register( FXOS8700CQ_REG_A_VECM_CFG, 0x48 ); //was 0x48
/*! ***************** ENABLE INTERRUPT GENERATION ***************** */
// enable interrupts for the feature using CTRL_REG4: vector + auto-sleep
ACC_Write_Register( FXOS8700CQ_REG_CTRL_REG4, ACC_INT_VECTOR | 0x80 );
// route interrupts to INT1 pin using CTRL_REG5: vector + auto-sleep
ACC_Write_Register( FXOS8700CQ_REG_CTRL_REG5, ACC_INT_VECTOR | 0x80 );
// CTRL_REG2 - set low power/low noise, auto-sleep: enabled
ACC_Write_Register( FXOS8700CQ_REG_CTRL_REG2, 0x09 | 0x04 );
// sleep event function enables: vector
ACC_Write_Register( FXOS8700CQ_REG_CTRL_REG3, 0x04 );
// FIFO setup: no FIFO
ACC_Write_Register( FXOS8700CQ_REG_F_SETUP, 0x00 );
ACC_Write_Register( FXOS8700CQ_REG_ASLP_COUNT, 0x06 );

// Setup device for acc only mode
// wake and sleep mode ODR setting: 12.5 Hz
ACC_Write_Register( FXOS8700CQ_REG_CTRL_REG1, 0x40 | 0x28 | 0x01 );


For handling the interrupt I read the INT_SOURCE register and decide based on content how to handle the event. If it is an auto-sleep interrupt the MCU simply reads SYSMOD to clear the interrupt.

The order of register reads is:

  2. SYSMOD - only if auto-sleep interrupt

The interrupt handling as such works fine according to logs. Also the ACC sensor is indeed going to sleep.

1951900 128 sleep event, mode 2
2012020 128 sleep event, mode 2
2092160 128 sleep event, mode 2
2172330 128 sleep event, mode 2
2252470 128 sleep event, mode 2
2332610 128 sleep event, mode 2
2412780 128 sleep event, mode 2


On the scope I see correct behavior at first (going to sleep after 1.9s). Then the INT1 signal fires continuously at the rate of the sleep-ODR (f=12.5Hz, T=80ms).


Am I missing something for clearing the auto-sleep interrupt?

Thanks for input on this!



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2 Replies

NXP Employee
NXP Employee

Hello JRB,

Thank you for your question. 

Please help answer following so that we can help assist you better:

- The advantage of using the auto-wake/sleep is that the system can automatically transition to a higher sample rate (higher current consumption) when needed but spends the majority of the time in the sleep mode (lower current) when the device does not require higher sampling rates. From your CTRL_REG1 configuration it appears that you are configuring both WAKE and SLEEP ODR to 12.5Hz? This won't give any advantage in your application using auto-wake/sleep. I would suggest you to refer to the app note AN4074.

- Please confirm the VECM THS you are configuring (its not very clear from the code snippet you have shared):

// = 0x02B9 => 143 *0.244mg = ~35mg = ~2°, debounce reset when out of trigger
ACC_Write_Register( FXOS8700CQ_REG_A_VECM_THS_MSB, 0x80 | 0x00 );
ACC_Write_Register( FXOS8700CQ_REG_A_VECM_THS_LSB, 0xD6 );

 I see that you are configuring A_VECM_THS_MSB as 0x80 and A_VECM_THS_LSB as 0xD6, that translates A_VECM as 0D6h => 214 * 0.244mg ~= 52mg, which seems a very low threshold. Please confirm whether you want to have VECM THS as ~=52mg as per your application requirements? 

- Please specify what is "ACC_INT_VECTOR".



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Contributor I

Dear Amit,

to answer your questions:

- auto-wake/sleep - it is intentional to run at the same sample rate in wake and sleep mode in our application

- VECM threshold - yes, it is intentional to have such a low value. This works well in our application.

- ACC_INT_VECTOR is 0x02, this is equal to int_cfg_a_vecm and int_en_a_vecm in Reg4+5.

Thanks for your support on this!


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