FXLS8471Q PCB Layout Suggestion Question

[matthewrentz]

I am interested in using the FXLS8471Q accelerometer in an upcoming design that has tight space requirements. I read in the datasheet that it is suggested to have all other components and vias more than 2mm away from the PCB land area. Unfortunately this is not possible for my design.

What are the potential risks involved in having vias or components roughly 1 mm away? Are there any other ways to minimize those risks?

I've purchased a breakout board from Freescale and measured the via distance with calipers and it seems they are less than 2 mm away from the chip.

Thanks for any help,

Matt

[david_diaz]

Hello Matthew,

Thank you for writing. Having components and/or vias closer than 2mm from the device may cause the noise and offset to potentially go out of spec. 

The value of the offset mentioned is not specified, since this would depend on the layout design and the component placed in this range, however, it’s possible to calibrate/compensate this offset by implementing the Zero-g offset calibration.

FXLS8471Q is factory calibrated for sensitivity and offset on each axis. The trim values are stored in Non-Volatile Memory (NVM). On startup, the trim parameters are read from NVM and applied to the internal compensation circuitry. After mounting the device to the PCB, the user may further adjust the accelerometer offsets through the OFF_X/Y/Z registers.

For more information on device calibration, please refer to NXP application note, AN4069:

Offset Calibration - AN4069

I hope this information will be useful for you.

If I misunderstood your question, feel free to let me know.  I will be glad to help.

Have a great day.

David Diaz.

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[matthewrentz]

Thanks David that was very helpful.

The part about it causing, "additional package stress if it is too close to the package land area," is what was concerning me.

I'm most likely going to re-calibrate at the end of production anyway. So if its mostly an offset/noise concern it might work out.

Matt