Accelerometer FXLS8974 - outside-of-thresholds doesn't work as I expect

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Accelerometer FXLS8974 - outside-of-thresholds doesn't work as I expect

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adrian_chmiel
Contributor III

Hi,

In the project I need to use outside-of-thresholds but I can't understand the mechanism of action.

Until LTHS is negative and UTHS is positive, work perfect. But when I try to sent for example LTHS 9 and UTHS 137, then interrupt is generated continuously.

 

I have only set interrupt for X axis:

X  value: 107
Up THS (accel): 171
Low THS (accel): 43

So the value should be in the window and the interrupt should not be generated. However, it is not.

The same situation occurs for negative values:

X value: -210
Up THS (accel): -146 (value: 3950)
Low THS (accel): -274 (value: 3822)

How it's work?

My registry value:

    	{FXLS896xAF_SENS_CONFIG1,	FXLS896xAF_SENS_CONFIG1_FSR_4G,					// 4G scale
    								FXLS896xAF_SENS_CONFIG1_FSR_MASK },
    	{FXLS896xAF_SENS_CONFIG3,	FXLS896xAF_SENS_CONFIG3_WAKE_ODR_50HZ		|	// 50Hz for WAKE mode
    								FXLS896xAF_SENS_CONFIG3_SLEEP_ODR_12_5HZ,		// 12.5Hz for SLEEP mode
									NO_DATA_MASK },
    	{FXLS896xAF_SENS_CONFIG4,	FXLS896xAF_SENS_CONFIG4_INT_PP_OD_OPEN_DRAIN,	// open drain on INT pin
    								NO_DATA_MASK },

		{FXLS896xAF_SDCD_CONFIG1,//	FXLS896xAF_SDCD_CONFIG1_OT_ELE_EN	|			// outside-of-thresholds event latch
									FXLS896xAF_SDCD_CONFIG1_X_OT_EN_EN,//	|			// Enabling SDCD WT for X Axis
//									FXLS896xAF_SDCD_CONFIG1_Y_OT_EN_EN	|			// Enabling SDCD WT for Y Axis
//									FXLS896xAF_SDCD_CONFIG1_Z_OT_EN_EN,				// Enabling SDCD WT for Z Axis
									NO_DATA_MASK},
    	{FXLS896xAF_SDCD_CONFIG2,	FXLS896xAF_SDCD_CONFIG2_SDCD_EN_EN	|			// Enable SDCD function
//    								FXLS896xAF_SDCD_CONFIG2_REF_UPDM_SDCD_REF,		// Enable Absolute Reference Mode and set OT Debounce counter to clear immediately when threshold criteria is false
    								FXLS896xAF_SDCD_CONFIG2_REF_UPDM_FIRST,			//
    								NO_DATA_MASK },
		{FXLS896xAF_SDCD_OT_DBCNT,	SHK_DEBOUNCE , NO_DATA_MASK },					// Debounce counter
    	{FXLS896xAF_SDCD_LTHS_LSB,	SHK_THS_LTHS_LSB, NO_DATA_MASK },				// Debounce LTHS LSB threshold
    	{FXLS896xAF_SDCD_LTHS_MSB,	SHK_THS_LTHS_MSB, NO_DATA_MASK },				// Debounce LTHS MSB threshold
    	{FXLS896xAF_SDCD_UTHS_LSB,	SHK_THS_UTHS_LSB, NO_DATA_MASK },				// Debounce UTHS LSB threshold
    	{FXLS896xAF_SDCD_UTHS_MSB,	SHK_THS_UTHS_MSB, NO_DATA_MASK },				// Debounce UTHS MSB threshold

		{FXLS896xAF_INT_EN,			FXLS896xAF_INT_EN_SDCD_OT_EN_EN,				// INT enabled for SDCD_WT_EN
									NO_DATA_MASK },

Best regards,
Adrian

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JackITB
NXP Employee
NXP Employee

Hello Kajgan,

Before you devise a potential issue with the sensor, I'd like to make sure you are configuring the accelerometer appropriately.

An important setting for the SDCD operation is the REF_UPDM choice in SDCD_CONFIG2 register. As you didn't mentioned what you are using, I'm gonna assume you align to adrian_chmiel programming in the original post :

{FXLS896xAF_SDCD_CONFIG2,	FXLS896xAF_SDCD_CONFIG2_SDCD_EN_EN	|			FXLS896xAF_SDCD_CONFIG2_REF_UPDM_FIRST,
				NO_DATA_MASK },

This means REF_UPDM = 01b.
In that case, the internal REF_X/Y/Z values of the SDCD are the first X/Y/Z measurement when the SDCD function is enabled (i.e. sensor entered ACTIVE mode). Those REF values are substracted from the current X/Y/Z acceleration data prior those ones feed the SDCD comparator window, consequently if the device position hasn't changed since the Sensor entered active mode, the data feeding the SDCD will be centered around 0g.
This could be the reason why you observe continuous "Outside Threshold" Interrupts.
But as I'm speculating about your settings, please confirm/provide it.
In order to avoid this behavior, you shall use REF_UPDM = 11b (absolute comparison mode).

Best regards,  Jacques.

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Kajgan
Contributor I

Until LTHS (Lower Threshold) is negative and UTHS (Upper Threshold) is positive, the system works perfectly, maintaining a stable operational state. However, a perplexing issue arises when attempting to set extreme values, such as LTHS 9 and UTHS 137. In this scenario, instead of achieving the desired settings, the system experiences a relentless stream of interrupt signals. This unexpected behavior can be quite frustrating, as it disrupts the intended functionality of the system and can have potential consequences for its overall performance.

The continuous generation of interrupts in this particular case indicates the presence of a critical issue in the system's handling of extreme threshold values. It may be caused by an overflow or underflow condition in the hardware or software, leading to erroneous calculations and subsequent interrupt generation. To rectify this problem and ensure the system's robustness, a thorough examination of the threshold-setting mechanism is essential, with a focus on addressing the root cause of this disruptive behavior. By identifying and resolving this issue, the system can regain its reliability and effectiveness in maintaining operational thresholds within the desired range.

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AmitPurohit
NXP Employee
NXP Employee

Please refer to: https://www.nxp.com/docs/en/application-note/AN12004.pdf appnote, it describe few SDCD motion detection examples and how to configure SDCD UTHS, LTHS. You can also configure OT debounce counter (SDCD_OT_DBCNT register) value to avoid spurious detections (SDCD_OT_DBCNT configures minimum number of debounce counts/ODR perioids needed to recognize the SDCD outside-of-threshold function event condition as true)

Please let us know if you have more questions.

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JozefKozon
NXP TechSupport
NXP TechSupport

Dear Adrien,

please check how you have connected the BT_MODE pin. To GND or to VDD?

JozefKozon_0-1680088829131.png

With Best Regards,

Jozef

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adrian_chmiel
Contributor III

to GND

Untitled.png

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JozefKozon
NXP TechSupport
NXP TechSupport

Hi Adrien,

thank you for the confirmation of the BT_MODE pin connection.

The values in the SDCD_LTHS[11:0] and in the SDCD_UTHS[11:0] should be entered in 2's complement format. Please use this calculator to calculate the values.

For example 171 in decimal, in binary is 0000 1010 1011, however you need to enter 2's complement format, which is 1111 0101 0101.

JozefKozon_0-1680162473278.png

For an example of negative number, the -146 in 2's complement format is 0000 1001 0010.

JozefKozon_1-1680162558616.png

Perhaps you have entered the correct formats, but unfortunately I don't see it from the code. Please confirm.

With Best Regards,

Jozef

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adrian_chmiel
Contributor III

So, if I would like to set value from 100 do -100 then I should set below?
UTHS = 100 -> 0xF9C ( 1111 1001 1100 )
LTHS = -100 -> 0x64 ( 0000 0110 0100 )

then interrupt never stops, throws INT flags X_OT_POL and X_OT_EF is set (OT_EA also of cource)

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AmitPurohit
NXP Employee
NXP Employee

In order to set the LTHS and UTHS values, you need to identify 12-bit 2's complement number x nominal sensitivity for the full scale range chosen.

Example in order to choose +/-100mg with FSR as +/-4G (nominal sensitivity = 1.95 mg/LSB)

(0xFFCC) x 1.95mg/LSB = ~-100mg

(0x0034) x 1.95mg/LSB = ~+100mg