Hi,
In the project I need to use outside-of-thresholds but I can't understand the mechanism of action.
Until LTHS is negative and UTHS is positive, work perfect. But when I try to sent for example LTHS 9 and UTHS 137, then interrupt is generated continuously.
I have only set interrupt for X axis:
X value: 107
Up THS (accel): 171
Low THS (accel): 43
So the value should be in the window and the interrupt should not be generated. However, it is not.
The same situation occurs for negative values:
X value: -210
Up THS (accel): -146 (value: 3950)
Low THS (accel): -274 (value: 3822)
How it's work?
My registry value:
{FXLS896xAF_SENS_CONFIG1, FXLS896xAF_SENS_CONFIG1_FSR_4G, // 4G scale
FXLS896xAF_SENS_CONFIG1_FSR_MASK },
{FXLS896xAF_SENS_CONFIG3, FXLS896xAF_SENS_CONFIG3_WAKE_ODR_50HZ | // 50Hz for WAKE mode
FXLS896xAF_SENS_CONFIG3_SLEEP_ODR_12_5HZ, // 12.5Hz for SLEEP mode
NO_DATA_MASK },
{FXLS896xAF_SENS_CONFIG4, FXLS896xAF_SENS_CONFIG4_INT_PP_OD_OPEN_DRAIN, // open drain on INT pin
NO_DATA_MASK },
{FXLS896xAF_SDCD_CONFIG1,// FXLS896xAF_SDCD_CONFIG1_OT_ELE_EN | // outside-of-thresholds event latch
FXLS896xAF_SDCD_CONFIG1_X_OT_EN_EN,// | // Enabling SDCD WT for X Axis
// FXLS896xAF_SDCD_CONFIG1_Y_OT_EN_EN | // Enabling SDCD WT for Y Axis
// FXLS896xAF_SDCD_CONFIG1_Z_OT_EN_EN, // Enabling SDCD WT for Z Axis
NO_DATA_MASK},
{FXLS896xAF_SDCD_CONFIG2, FXLS896xAF_SDCD_CONFIG2_SDCD_EN_EN | // Enable SDCD function
// FXLS896xAF_SDCD_CONFIG2_REF_UPDM_SDCD_REF, // Enable Absolute Reference Mode and set OT Debounce counter to clear immediately when threshold criteria is false
FXLS896xAF_SDCD_CONFIG2_REF_UPDM_FIRST, //
NO_DATA_MASK },
{FXLS896xAF_SDCD_OT_DBCNT, SHK_DEBOUNCE , NO_DATA_MASK }, // Debounce counter
{FXLS896xAF_SDCD_LTHS_LSB, SHK_THS_LTHS_LSB, NO_DATA_MASK }, // Debounce LTHS LSB threshold
{FXLS896xAF_SDCD_LTHS_MSB, SHK_THS_LTHS_MSB, NO_DATA_MASK }, // Debounce LTHS MSB threshold
{FXLS896xAF_SDCD_UTHS_LSB, SHK_THS_UTHS_LSB, NO_DATA_MASK }, // Debounce UTHS LSB threshold
{FXLS896xAF_SDCD_UTHS_MSB, SHK_THS_UTHS_MSB, NO_DATA_MASK }, // Debounce UTHS MSB threshold
{FXLS896xAF_INT_EN, FXLS896xAF_INT_EN_SDCD_OT_EN_EN, // INT enabled for SDCD_WT_EN
NO_DATA_MASK },
Best regards,
Adrian