SPD eMCEM_FaultContainerType->au32Faults

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SPD eMCEM_FaultContainerType->au32Faults

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JD_Wilson
NXP Employee
NXP Employee

Hi Team,

 

Our customer Nexteer is having difficulty decoding the eMCEM_FaultContainerType and the corresponding au32Fault values. They are not sure how to align them with the Fault list in 3.9.3.1 S32K3_SPD_EMCEM_UM.

Also is there reasoning for there to be 6 elements in the array and what do they map to? Are they supposed to represent the NCF slots or something else?

Below are some of their examples:

JD_Wilson_0-1701975890596.png

JD_Wilson_2-1701975890662.png

JD_Wilson_3-1701975890665.png

 

Regards,
JD Wilson

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frantisekdobes
NXP Employee
NXP Employee

Hello,

the au32Fault array has six elements which correspond directly to HW registers DCMROD3, 4 up to 8 in DCM_GPR HW module. The mapping is as follows:
au32Faults[0] -> DCMROD3
au32Faults[1] -> DCMROD4
….
au32Faults[5] -> DCMROD8

For example in above screenshot there is value 8388608 (0x80000000) in au32Faults[0]. This corresponds to bit 31 in DCMROD3 register which is
CM7_1_ICDATA_ECC_ERR bit (Cortex-M7_1 I-cache Multi-Bit ECC Error).

Best Regards,

Frantisek

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frantisekdobes
NXP Employee
NXP Employee

Hello,

the au32Fault array has six elements which correspond directly to HW registers DCMROD3, 4 up to 8 in DCM_GPR HW module. The mapping is as follows:
au32Faults[0] -> DCMROD3
au32Faults[1] -> DCMROD4
….
au32Faults[5] -> DCMROD8

For example in above screenshot there is value 8388608 (0x80000000) in au32Faults[0]. This corresponds to bit 31 in DCMROD3 register which is
CM7_1_ICDATA_ECC_ERR bit (Cortex-M7_1 I-cache Multi-Bit ECC Error).

Best Regards,

Frantisek

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JD_Wilson
NXP Employee
NXP Employee

Hi @frantisekdobes,

 

Thank you for the clarification this makes a lot of sense.

 

I think you had a typo 8,388,608(dec) = 0x80 0000

so the error screenshotted with the api calling PRAM2_ECC_ERR correctly shows bit 23 in DCMROD being set.

JD_Wilson_0-1702577131862.png

Regards,

JD Wilson

 

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JD_Wilson
NXP Employee
NXP Employee

Following up again, This is a major blocking point for Nexteer. Any help is appreciated.

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JD_Wilson
NXP Employee
NXP Employee

Hi Team,

 

Following up on this post for update.

 

Regards,
JD Wilson

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