S32M276 - Sensorless 6-step BLDC motor control

Yes

Note:

The example was designed on:

C-project based example is a part of:

S32M27XEVB-SW application SW for S32M27xEVB (this 6-step application has been the part of the appliction SW from revision 1.1)

Application software contains:
- S32M27xEVB_BLDC_6Step_Sensorless - Low-level drivers of RTD and S32 Design Studio Configuration Tools (S32CT) are used to demonstrate a BLDC 6-step sensorless application.
S32M276SFFRD_MC_SW application SW for S32M276SFFRD (this 6-step application has been the part of the appliction SW from revision 1.1)

Application software contains:
- S32M276SFFRD_BLDC_6Step_Sensorless - Low-level drivers of RTD and S32 Design Studio Configuration Tools (S32CT) are used to demonstrate a BLDC 6-step sensorless application.

1. Introduction

This article describes the design of a 3-phase Brushless DC (BLDC) motor control drive using S32M276 NXP integrated solution.

Following are the supported features:

3-phase BLDC speed control based on Six-step commutation control
Shaft position obtained by BEMF (Back Electromotive Force) voltage zero-crossing detection technique
DC-bus current, DC-bus voltage and BEMF voltage sensing
Motor speed determined by BEMF zero-crossing period
Application control user interface using FreeMASTER debugging tool
Motor Control Application Tuning (MCAT) tool

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2. System concept

The system is designed to drive a 3-phase BLDC motor. The application meets the following performance specifications:

Targeted at the S32M76xEVB-C064/L064 Evaluation Board and S32M276SFFRD EVB (refer to dedicated user manual for EVBs available at www.nxp.com) See section References for more information.
Control technique incorporating:
- Six-step commutation control of 3-phase brushless DC motor without position sensor
- Rotor position is obtained by BEMF voltage zero-crossing detection technique
- Closed-loop speed control with action period 1ms
- Bi-directional rotation
- Motor current limitation
- Alignment and start-up
- 50μs current sampling period
Automotive Math and Motor Control Library (AMMCLIB) – Speed control loop built on blocks of precompiled SW library (see section References)
FreeMASTER software control interface (motor start/stop, speed setup)
FreeMASTER software monitor
FreeMASTER Motor Control Application Tuning (MCAT) tool (motor parameters, speed loop, sensorless parameters)
FreeMASTER software MCAT graphical control page (required speed, actual motor speed, start/stop status, DC-Bus voltage level, DC-Bus current, system status)
FreeMASTER software speed scope (observes actual and desired speeds, DC-Bus voltage and DC-Bus current)
FreeMASTER software high-speed recorder (six-step commutation control quantities)
DC-Bus over-voltage and under-voltage, over-current, overload and start-up fail protection.

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3. Sensorless BLDC control

3.1. Overview of the brushless DC motor

The description of fundamental brushless DC motor principles, overview of electronic commutation control and speed/torque control of BLDC motor can be found in NXP application note AN12435: 3-phase Sensorless BLDC Motor Control Kit with S32K144, chapters 3.1., 3.1.1., 3.1.2.

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3.2. Output voltage actuation and complementary unipolar PWM
modulation technique

The 3-phase voltage source inverter shown on page 7 of S32M27xEVB schematics, see References. It uses single DC-bus shunt resistor (represented as R134 and R135 in parallel). DC-bus current which flows through the shunt resistor produces a voltage drop which is interfaced to the AD converter of microcontroller through the integrated Digital Programmable Gain Amplifier (DPGA) integrated inside S32M276 . The BEMF voltage dividers for BEMF measurement (used for sensorless 6-step control) are integrated in S32M276.
The description of the PWM technique used for BLDC motor control, is available in NXP application note AN12435: 3-phase Sensorless BLDC Motor Control Kit with S32K144, chapter 3.2.

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3.3. Position estimation based on BEMF zero-crossing detection

The position detection based on BEMF measurement and BEMF measurement are explained in NXP application note AN12435: 3-phase Sensorless BLDC Motor Control Kit with S32K144, chapter 3.3. The only difference in conditioning of BEMF voltages and DC Bus current - in case of S32M27x no external dividers for BEMF voltage are needed since these are integrated in S32M27x and voltage drop on shunt resistor is conditioned by S32M27x-integrated DPGA (Digital Programmable Gain Amplifier), Refer to S32M276 Reference Manual and Datasheet, see section References

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3.4. States of the sensorless BLDC control based on Hall sensors

In order to start and run the BLDC motor, the control algorithm has to go through the following states:

Initialization
Calibration
Alignment (initial position setting)
Start-up (forced commutation or open-loop mode)
Run (sensorless running with BEMF acquisition and zero-crossing detection)

3.4.1. Initialization

Initialization of variables relevant for motor control.

3.4.2. Calibration

In this state the DC current measurement calibration takes place.

3.4.3. Alignment

Before starting, the motor is aligned to the middle of commutation sector 0. During the alignment state, all three phases are powered in order to get the best performance behavior in either direction of shaft rotation. Phase C is connected to the positive DC bus voltage and phases A and B are grounded. The alignment time depends on the mechanical constant of the motor, including load, and also on the applied motor current.

3.4.4. Start-up

In the start-up state, motor commutation is controlled in an open-loop mode without any rotor position feedback. The commutation period is controlled by an open-loop starting curve. The open-loop start is required only until the shaft speed is high enough (approximately 5% of nominal motor speed) to produce an identifiable BEMF voltage.

3.4.5. Run

The block diagram of the run state is represented by Figure 1. The motor speed is estimated based on Hall events. The difference between the demanded and estimated speeds is fed into the speed PI controller. The output of the speed PI controller is proportional to the voltage to be applied to the BLDC motor. The motor current is measured and filtered and used as feedback into the current controller. The output of the current PI controller limits the output of the speed PI controller. The limitation of the speed PI controller output protects the motor current from exceeding the maximal allowed motor current.

Figure 1. Speed control with current limitation

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4. Software implementation on S32M276

4.1. S32M276 – Key modules for BLDC 6-step control

The S32M276 is an integrated solution which comprises MCU and Application Extension part (AE). The AE includes modules such as Gate Driver Unit (GDU) and Digital Programmable Gain Amplifier (DPGA) which allow for using S32M276 in motor control applications with minimum of external components. The MCU part includes modules such as the Enhanced Modular IO Subsystem (eMIOS), Logic Control Unit (LCU), Trigger
MUX (TRGMUX), Body Cross-triggering Unit (BCTU) and Analogue-to-Digital Converter (ADC) suitable for real-time control applications, in particular, motor control applications. These modules are directly interconnected and can be configured to meet various motor control application requirements. Figure 2 shows a module
interconnection for a typical BLDC 6-step application working in sensorless mode using single shunt current sensing. The modules are described in further chapters and the detailed description can be found in the S32M27x Series Reference Manual (see section References).

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4.1.1. Module interconnection

As mentioned earlier, S32M27x consists of two parts: MCU and AE which are connected together via die-to-die (D2D) connections.

The SPI interface (part of D2D) serves for parameter settings and status monitoring of AE and the rest of D2D interface is used for motor control loop (e.g.: DC bus current reading).
The AE comprises modules vital for motor control such as Gate Driver Unit (GDU) and Digital Programmable Gain Amplifier (DPGA) which allow for using S32M276 in motor control applications with minimum of external components.
The GDU drives the power MOSFETs. The GDU is interconnected with the outputs of FTM via D2D connections.
The shunt resistor voltage drop signal (proportional to DC Bus current) is conditioned by the integrated DPGA which output is connected to the ADC via D2D connection.
DC Bus voltage and BEMF voltages are conditioned via integrated voltage dividers which outputs are connected to the ADC via D2D connection.

The MCU modules involved in output actuation, data acquisition and synchronization of actuation and acquisition are called Control Loop. This control loop consists of the eMIOS, LCU, TRGMUX, BCTU and ADC modules. The control loop is a modular concept and is very flexible in operation and can support static, dynamic or asynchronous timing. eMIOS plays a role of the real time timer/counter. Within the control loop it is responsible for generation of basic PWM signal (period, duty cycle), generation of the trigger for analogue data capturing in the precise moment or measuring the time between events. LCU enriches this modular concept with advance features. In PWM generation it is responsible for creation of PWM complementary pairs, dead time insertion, execution of a commutation table (role of the phases based on the commutation sector) and disabling/enabling PWM outputs. BCTU and ADC modules are responsible for analog data capturing. BCTU answers question “what is going to be measured?” by a predefined list of ADC channels. The ADC answers question “How it is going to be measured?” by setting a conversion resolution, sampling duration etc.

eMIOS timer uses the concept of time-bases for signal synchronization. There are 5 channels (CH0, CH8, CH16, CH22 and CH23) which can act as the time-base what means that other channels can see value of their counter through the bus. CH0, CH8, CH16 can create local time-bases for 7 following channels and CH22 and CH23 can create a global time-bases for any channel. In the example eMIOS0 is used for PWM and triggers. CH1 is responsible for PWM. CH2, CH3 are responsible for triggering of the BCTU. CH2 triggers parallel measurement of DC-bus voltage and BEMF voltage of disconnected phase and CH3 triggers the DC-bus current sample.

eMIOS0 and LCU are connected through TRGMUX unit which is responsible for a configurable signal interconnection within the microcontroller. The eMIOS0 channel CH1 creates basic PWM signal, and it is formed using flexible Output Pulse Width Modulation Buffered (OPWMB) eMIOS mode where two compare registers (A, B) are used to control rising and falling edge independently. LCU OUT0-OUT3, OUT8-OUT9 create complementary PWM pairs to control MOSFET transistors. Besides PWM signal, there are direction and sector inputs controlled by SW override feature. The LCU uses look-up tables, output polarity control to perform commutation and to create complementary PWM pattern for active phase. Configurable digital filters are used to insert deadtime to the final complementary signals for transistors. Same as in PWM signal generation, OPWMB mode is used for generation of trigger signals. Channels are linked with PWM time base CH0. Time base CH0 operates in Modulus Counter Buffered (MCB) up counting mode, where period is set by register A.

Two eMIOS trigger channels are connected internally to BCTU (input channels BCTU_EMIOS_0_2 and BCTU_EMIOS_0_3) through eMIOS channel flag. In this example flag is generated on compare with register B. BCTU handles flag clearing. BCTU is capable of controlling all three ADCs, so list of single or parallel conversions can be invoked. In this example BCTU_EMIOS_0_3 triggers single conversion of ADC1 (channel S8) to obtain DC-link current. BCTU_EMIOS_0_2 triggers list of parallel of conversion ADC1 (channel S18 for DC-bus voltage) and ADC0 (channel S16/S17/S19 for BEMF voltage of disconnected phase). The result can be stored into BCTU result register, BCTU FIFO and they are also visible in original ADC result registers or can be transferred by DMA.

eMIOS1 CH8 is used as a timer to measure zero-cross time and to set commutation event. CH8 operates in MCB mode where actual value of the counter can be read, and it's compared with register A defines the event for commutation.

Detailed description of the respective modules can be found in the S32M27x Series Reference Manual (see section References).

Figure 2. S32M276 modules interconnection.

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4.1.2. Module involvement in digital BLDC control loop

This section will discuss timing and modules synchronization to accomplish BLDC 6-step control on the S32M276 and the internal hardware features.

The timing diagram of the automatic synchronization between PWM and ADC in the BLDC application is shown in Figure 3.

Figure 3. Time Diagram of PWM and ADC Synchronization and notifications.

eMios is the main component in the peripheral chain which defines precision timing. CH0 is used as time-bases for PWM and for trigger signals generation. Time-base counter is configured to up counting mode and wrapping value is defined by register A. In this example, PWM frequency and sampling frequency is 20 kHz. eMios PWM and trigger channels can see time-base counter through the internal bus and perform compare action with registers A, B and change the channels output and are able to set flag on compare event. Registers A and B are double buffered and updated on reload of selected time-base. LCU using LUTs (look up tables) creates complementary PWM pairs of active phase and grounds and disconnect other phases depending on sector and direction (Phase A OUT2 and OUT3 are depicted in the diagram for simplicity). LCU Digital filters are capable to delay edges of the LUT output and to insert the dead time. When commutation event occurs (eMIOS1 CH8 compare of its registers A and CNT), eMIOS1GptNotify notification function is invoked, where LCU SW inputs (current sector information) are changed and LCU performs commutation. PWM duty cycle (CH1) and trigger points (CH2 and CH3 flag on compare B) are calculated dynamically in periodic interrupt routine (PIT1 timer). DC bus current measurement is triggered in the middle of the PWM cycle as a single conversion and the DC-bus voltage and BEMF voltage are triggered at the 90% of the second half of active PWM pulse as a list of parallel conversion. When end of list event occurs, notification function is called to perform zero-cross detection. When zero-cross is found the new commutation event can be set.

There are three notification functions (Call from peripheral ISR is ensured by RTD) in the example. Pit1Notif is called periodically with 1ms period to calculate speed control algorithm and to update duty cycle and trigger points. This notification has the lowest priority. Higher priority is granted to BctuListNotif which is also called periodically (when all analogue quantities are measured) with the same period as PWM 50us. Zero-cross detection is being executed until the zero-cross has been found. When zero-cross is found commutation event is configured (eMIOS1 CH8). When commutation event occurs, eMIOS1GptNotify function is called. This notification is of the highest priority. Sector is incremented or decremented depending on the speed direction and new value is set to LCU input. After the commutation event new BCTU list is selected depending on actual sector and new zero-cross search is started in BctuListNotif. eMIOS1GptNotify is asynchronous interrupt depending on rotor speed.

Note: example also contains AE fault notification handler. This is called when AE interrupt pin (PTD3) falling edge is detected.

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4.2. S32M276 Device initialization

To simplify and accelerate application development, embedded part of the BLDC 6-step motor control application has been created using S32M276 Real Time Drivers (RTD). S32M276 can be configured either by means of S32 Configuration Tools (CT) - using GUI

or programmed directly using RTD drivers. Peripherals are initialized at beginning of the main() function. For each S32M276 module, there is a specific configuration function that uses S32M276 RTD APIs and configuration structures generated by RTD graphical tools to configure the MCU.

Detailed RTD documentation can be found in folder created with S32 Design Studio installation (see References).

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4.2.1. Pins

Pins input/output functionality and pins electrical configuration is generated by “PINs tool” and configuration is applied by calling Siul2_Port_Ip_Init API.

Figure 4. Pin configuration in Pins tool.

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4.2.2. AE fault interrupt

PTD3 pin is used to capture interrupt from AE and input capture functionality is configured by Siul2_Icu_Ip driver. AE_INT_Handler is then the callback function used in the SW example for AE fault interrupt processing.

Figure 5. Configuration of input capture for AE fault detection.

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4.2.3. Clock configuration

This clock configuration can be setup by S32CT Clocks tool which offers visual graphical user interface (GUI) to change the settings. Clock settings are applied by calling Clock_Ip_Init() function, where generated configuration by Clocks tool is an argument.

To run the core of the S32M276 at maximum frequency 120MHz, S32M276 is supplied externally by 16 MHz crystal in case of S32M27xEVB (in case of S32M276SFFRD the crystal frequency is 24 MHz). This needs to be reflected in the settings of Cloks tool. This clock
source supplies Phase-lock-loop (PLL) which its output is adjusted by dividers to 120 MHz frequency. PLL output PHI0 is then used to supply the core CORE_CLK. All real-time control peripherals are supplied by CORE_CLK, what eliminates unwanted wait states on the bus when peripherals are controlled by core during runtime.

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4.2.4. Pwm and triggers - eMIOS

eMIOS timer settings for PWM generation and trigger generation are covered by Emios_Mcl_Ip and Emios_Pwm drivers.

Emios_Mcl_Ip driver is responsible for the time-base configuration. PWM time-base is up counting which is selected by item Master Bus Mode Type and wrapping value is defined by Default period item which is the value for register A (see timing diagram). eMios time-bases are initialized by calling Emios_Mcl_Ip_Init(), they are started synchronously by calling Emios_Mcl_Ip_ConfigureGlobalTimebase.

Emios_Mcl_Ip and Emios_Pwm drivers cover the same eMIOS peripheral instance, so PWM exclusive access is allowed. PWM and trigger channels are configured by calling Emios_Pwm_Ip_InitChannel where important settings in configuration tool are Mode select to select OPWMB mode where B stands for buffered. This mode allows double buffered update of compare registers A and B on time-base reload.
Time-base for the channel is selected by Counter Bus field where BCDE means local time-base and PwmEmiosBusRef is a reference to time-base settings.
The initial duty cycle is defined by Phase Shift (which is value for reg A) and Duty cycle (where value for register B is Duty cycle + Phase Shift).
For the update of new values Emios_Pwm_Ip_UpdateUCRegA and Emios_Pwm_Ip_UpdateUCRegB are called. Emios_Mcl_Ip_ComparatorTransferDisable disables update of A and B registers, after new vales are set. Emios_Mcl_Ip_ComparatorTransferEnable again enables update, and new values are propagated synchronously on the nearest time-base reload event.
See the BLDC 6-Step SW example for reference.

Figure 6. Configuration of PWM and BCTU triggers.

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4.2.5. TRGMUX

TRGMUX is responsible for interconnection of microcontroller internal signals. Hardware Group defines group of TRGMUX outputs (from TRGMUX to peripheral). Hardware Output defines the output from TRGMUX to peripheral, and Hardware Input defines input from peripheral to TRGMUX. All possibilities for TRGMUX connection can be found in S32M27x reference manual, see References.

Hint: Pins with TRGMUX out functionality are useful for debugging/visualization of internal signals.

Figure 7. TRGMUX configuration for PWM and test/debug signals.

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4.2.6. PWM and commutation - LCU

The whole LCU0 instance is used for commutation control. Logic Cells LC0 and LC2 are responsible for generation of PWM signal for MOSFETs based on PWM signal from eMIOS and selected voltage vector - switching combination of the MOSFETs. The vector defines which phase is grounded which phase is not connected (both MOSFETs are turned off) and which phase is controlled by PWM.
Logic Cell LC1 converts speed direction and current sector to desired vector. Direction input and sector bits are using SW override feature and can be set by software.

Figure 8. LCU 0 usage and sector and switching table definition.

Note: The direction of rotation in the switching table is valid for Sunrise motor and may be reversed for other motor type 42BLY3A78-24110.

Figure 9. LCU 0 Logic cell LC2 look-up table for voltage vectors generation based on vector bits.

Every Logic cells are equipped with 4 inputs and 4 outputs. Outputs of the Look Up Table defines the output state of all combination of inputs where combination “0000” represents LSB and combination “1111” represents MSB of LUT register value. For LC1, inputs I0-I2 are sector bits and input I3 is speed direction. There are six possible sectors 0-5. Other values (6,7) shouldn’t appear on input so zero vector is defined for them. There is also possibility to create speed signal which is not used for any functional feature in this example but can be displayed on debug pin using TRGMUX.

Inputs of Logic Cells LC0 and LC2 are representing the selected vector (I0-I2) and PWM signal I3. LC0 generates outputs for MOSFETs of Phase A and Phase C and LC2 generates MOSFETs outputs for the Phase B. There are six active vectors (1-6) zero vector (0) and vector for alignment (V7). During alignment process, vector inputs are set to SW override mode and align vector is selected by SW. After alignment process, vector inputs are again controlled by LC1. Outputs from Look Up Tables of LC0 and LC2 are adjusted by digital filters to form the final signal for MOSFETs with inserted dead time.

Figure 10. LCU0_LC0 and LCU0_LC2 LUTs vs the desired voltage vector.

LCU is configured by LCU_Ip driver. Configuration is applied by calling Lcu_Ip_Init. The most important parts of the configuration can be found in Lcu Logic Input tab for LCU inputs configuration and in Lcu Logic Output tab for LCU outputs configuration. The key items for Output configuration are Output LUT Control to configure the logic of the output Look Up Table, LUT Rise Filter and LUT Fall Filter to delay the edges of the LUT output. LCU channels are enabled/disabled by calling Lcu_Ip_SetSyncOutputEnable. SW override of the LCU inputs is controlled by Lcu_Ip_SetSyncInputSwOverrideEnable and values for the inputs are set by Lcu_Ip_SetSyncInputSwOverrideValue. More detailed information about working with LUT can be found in AN14482: 3-phase Sensorless PMSM Motor Control with S32M276, chapter 4.2.3.3 LCU and in the S32M27x Reference Manual (see section References).

Figure 11. LCU settings in S32CT.

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4.2.7. eMIOS GPT

eMIOS1 CH8 is used as a general-purpose timer. The first important setting is in Emios_Mcl_Ip driver clock divider value 192 which rescale the clock to 625KHz to cover longer commutation periods. Interrupt and notification call, and next settings are set in Emios_GPT configuration. Settings are applied by Emios_Gpt_Ip_InitChannel, Emios_Gpt_Ip_EnableChannelInterrupt and Emios_Mcl_Ip_Init. Time for notification call (commutation event) is set by consecutive calling Emios_Gpt_Ip_StopTimer and Emios_Gpt_Ip_StartTimer.

Figure 12. eMIOS GPT settings.

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4.2.8. PIT

PIT timer is used to generate 1KHz periodic interrupt routine where speed control algorithm is executed. PIT is started by calling Pit_Ip_StartChannel where the period is defined by the third argument in PIT ticks.

Figure 13. LPIT settings.

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4.2.9. Analogue data capturing

Adc_Sar_Ip driver is responsible for configuration of ADCs. ADC0 and ADC1 instances are used for motor control measurements and are controlled by BCTU (ADC Ctu mode: Control mode). Configuration is focused on how the conversion is performed. The important parameters are Conversion resolution, Data alignment, voltage reference, Sampling duration etc. Settings are applied by calling Adc_Sar_Ip_Init and calibration is executed by calling Adc_Sar_Ip_DoCalibration.

Conversion result is always stored to ADC result register (also when conversion was started by BCTU and result is also transferred to BCTU data destination). Reading conversion result from ADC is demonstrated for DC-link current and DC-link voltage by calling Adc_Sar_Ip_GetConvData.

Figure 14. ADC configuration.

BCTU settings are covered by Bctu_Ip driver. There are two trigger configurations. Channel BCTU_EMIOS_0_2 (Trigger source item) is configured as the trigger of the list of parallel conversions of ADC0 and ADC1. List operation is set by Defines the BCTU ADC command list operational mode and selected parallel instances are defined by Adc Target Mask (2-bit information where bit0 – ADC0, bit1 – ADC1). There are 3 predefined lists. Every list contains 2 items where end of the list is defined by Last channel checkbox in Bctu LIST Items. List starts parallel conversion of ADC0 channel S18 (DC-link voltage) and appropriate BEMF voltage ADC1 S16/S17/S19. After the conversion of the last item, the list stars from the beginning and waits for the trigger from eMIOS. Channel BCTU_EMIOS_0_3 is configured as single conversion of ADC0 S8 (DC-link current).

Data are stored into in Data destination item. When the list is completed List last conversion notification is called. Reading from BCTU ADC result register is demonstrated for BEMF voltage by calling Bctu_Ip_GetConvData. BCTU configuration is applied by Bctu_Ip_Init. Current list is changed by calling Bctu_Ip_ConfigTrigger after commutation.

Figure 15. BCTU configuration.

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4.2.10. Communication and Application Extension (AE) configuration

Configuration of communication and AE is described in NXP application note AN14482: 3-phase Sensorless PMSM Motor Control with S32M276. Identical AE configuration is used also for this SW example.

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4.3. Software architecture

Figure 16 presents the conceptual system block diagram of the BLDC Six-step control technique working in sensorless mode.

The application is optimized for S32M276 motor control peripherals to achieve the least possible core involvement in state variable acquisition and output action application. The motor control peripherals (ADC, BCTU, eMIOS, LCU) are internally linked together to work independently from the core, and to achieve deterministic sampling of analog quantities and precise commutation of the stator field. The software part of the application consists of different blocks which are described below. The entire application behavior is controlled from a PC through the FreeMASTER run-time debugging tool.

The inputs of the control loop are the measured voltages and current on the power stage: the DC bus current, DC bus voltage and BEMF voltages.

From a control perspective, the block diagram can be divided into two logical parts:

Commutation control, where the phase voltages and DC bus voltage are used to calculate the actual position of the shaft. According to the identified position, the next commutation event can be prepared.
Speed/torque control, where the required shaft velocity is compared to the actual measured speed and regulated by the PI controller. The output of the speed PI controller is the duty cycle. The duty cycle is limited by the current PI controller and assigned to the PWM.

Figure 16. System block diagram.

4.3.1. Introduction

This section describes the software design of the Sensorless BLDC Six Step Control framework application. The application overview and description of software implementation are provided. The aim of this chapter is to help in understanding of the designed software.

4.3.2. Application data flow overview

The application software has three main states: the alignment state, the open-loop start state, and the run state. In the run state, the BLDC motor is fully controlled in a closed-loop sensorless mode. After the initialization of the peripheral modules has completed, the software enters the alignment state. In alignment state, the rotor position is stabilized into a known position in order to create the same start-up torque in both directions of rotation. This is achieved by applying a PWM signal to phase A. Phases B and C are assigned with a duty cycle equal to zero; that is, they are connected to the negative pole of the DC bus. The value of the duty cycle on phase A depends on the motor inertia and load applied on the shaft. Such a technique aligns the shaft into position between phase B and C, what ensures the same start-up torque in both directions of rotation. The duration of the alignment state depends on the motor’s electrical and mechanical constants, the applied current (meaning duty cycle), and the mechanical load.

When the alignment time-out expires, the application software moves to the open-loop start state. At a very low shaft velocity, the BEMF voltage is too low to reliably detect the zero-crossing. Therefore, the motor has to be controlled in an open-loop mode for a certain time period. The very first vector generated by the stator windings needs to be set to a position 90° relative to the position of the flux vector generated by magnets mounted on the rotor. The duration of the open-loop start state is defined by the number of open-loop commutations. The number of open-loop commutations depends on the mechanical time constant of the motor, including load, and also on the applied voltage (duty cycle). The shaft velocity after an open-loop start-up is approximately 5% of nominal velocity. At a velocity approximately 5% of nominal velocity, the BEMF voltage is high enough to reliably detect the zero-crossing.

After a defined number of commutation cycles, the state changes from the open-loop start state to the run state. From here on, the commutation process based on the BEMF zero-crossing measurement takes place, and the control enters the closed-loop mode.

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4.3.3. State Machine

The application state machine is implemented using a one-dimensional array of pointers to state functions, called AppStateMachine[]. The index of the array specifies the pointer to the related application state function. The application state machine consists of the following seven states selected using the index variable appState value.

Possible state transitions are shown in Figure 17.

The application states are listed in the following table:

Table 1. Application states

AppState	Application state	Description
0	INIT	The INIT state provides the initial configuration of the PWM duty cycle and initialization of DC bus current offset calibration. The state machine then transitions to the STOP state.
1	CALIB	The CALIB state provides the DC bus current calibration. The state machine then transitions to ALIGNMENT state.
2	ALIGNMENT	In the ALIGNMENT state, the alignment vector is applied to the stator to set the rotor to the defined position. The duration of the alignment state and the duty cycle applied during the state are defined by the ALIGN_DURATION and ALIGN_VOLTAGE macro values accessible in the BLDC appconfig.h header file. The state machine then transitions to the START state.
3	START	In the START state, the motor commutation is controlled in an open-loop without any rotor position feedback. The initial commutation period is controlled by the STARTUP_CMT_PER macro value. Motor acceleration (commutation period multiplier <1) is set by the START_CMT_ACCELER macro value. The number of commutations in the START state is defined by STARTUP_CMT_CNT macro value. All macro values are accessible in the BLDC_appconfig.h header file. The aim of the START state is to achieve an RPM where the zero-crossing event can be reliably detected (BEMF high enough). Once the defined number of commutations is performed, the state machine transitions to the RUN state.
4	RUN	In the RUN state, the BLDC motor is controlled in the closed-loop by the sensorless algorithm (BEMF zero-crossing detection). Speed control and current limitation are performed as described in 4.3.5, “Speed evaluation, motor current limitation and control”. The transition to the INIT state is done by setting the appSwitchState variable to 0.
5	STOP	In the STOP state, the motor is stopped and prepared to start running. Transition to the ALIGNMENT state is performed once the appSwitchState variable is set to 1 and the freewheeling counter expires.
6	FAULT	The fault detection function is executed in the main endless loop, detecting DC bus undervoltage, DC bus overvoltage, DC bus overcurrent, and AE faults. Once any of the faults are detected, the state machine automatically transitions to the FAULT state. The PWM outputs are set to the safe state. To exit the FAULT state, all fault sources must be removed and the faultSwitchClear variable has to be set to 1 to clear the fault latch. The state machine then automatically transitions to the INIT state.

Figure 17. Application state machine

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4.3.5. Speed evaluation, motor current limitation and control

The speed controller is executed in a timer interrupt every 1 ms. The actual speed is calculated from all of the last six commutation periods, and this is stored as the actual speed. The required speed is fed into the ramp function controlling the motor speed slope. The difference between the speed ramp function output and actual speed defines the speed error.

In the closed-loop mode, the actual speed error is fed into the PI controller function. Inputs to the PI controller function include the speed error and the PI controller’s parameters such as the proportional and integral gain constants. The output of the PI controller is the duty cycle, which is scaled to the PWM resolution.

At the end of the speed control function, the duty cycle is loaded into the eMIOS compare registers of eMIOS0_CH1.

The current limit controller is located in the same 1 ms timer interrupt (.../src/main.c/Pit1Notif() ) as the speed controller because the inputs and outputs of both controllers are linked together.

When the actual speed has been calculated, the current limit PI controller can be called by feeding it with the difference between the actual current and the maximum allowed current of the motor. The output of the PI controller is scaled to the number proportional to the PWM period. After the current PI controller has calculated its duty cycle, both duty cycle output values are compared to each other.

If the speed PI controller duty cycle output is higher than the current limit PI controller output, then the speed PI Controller duty cycle output value is limited to the output value of the current limit PI controller. Otherwise, the speed PI duty cycle output will be taken as the duty cycle update value. At the end, the integral portion values of both the PI controllers need to be synchronized to avoid one of the controllers increasing its internal value as far as the upper limit. If the duty cycle was limited to the current PI duty cycle output, then the integral portion of the current PI controller will be copied into the integral portion of the speed controller, and vice versa.

4.3.6. AMMCLIB Integration

The integration of AMMCLIB is done in the manner identical to the one described in NXP application note AN12435: 3-phase Sensorless BLDC Motor Control Kit with S32K144.

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5. FreeMASTER and MCAT user interface

The FreeMASTER debugging tool is used to control the application and monitor variables during run time.
FreeMASTER and MCAT interface enables online application tuning and control.

MCAT (Motor Control Application Tuning) is a graphical tool dedicated to motor control developers and the operators of modern electrical drives. The main feature of proposed approach is automatic calculation and real-time tuning of selected control structure parameters. Connecting and tuning new electric drive setup becomes easier because the MCAT tool offers a possibility to split the control structure and consequently to control the motor at various levels of cascade control structure.

FreeMASTER and MCAT user interface are described in NXP application note AN12435: 3-phase Sensorless BLDC Motor Control Kit with S32K144.

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6. Conclusion

The design described shows the simplicity and efficiency in using the S32M276 microcontroller for sensorless BLDC motor control and introduces it as an appropriate candidate for various low-cost applications in the automotive area. MCAT tool provides interactive online tool which makes the BLDC drive application tuning friendly and intuitive.

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7. References

• S32 Design Studio IDE for S32 Platform
• Real-Time Drivers (RTD)
• FreeMASTER Run-Time Debugging Tool
• Automotive Math and Motor Control Library
• S32M27x Reference Manual
• S32M2xx Data Sheet
• S32M27x PMSM/BLDC Motor Control Evaluation Boards
• S32M276SFFRD Reference Design Board for Automotive Motor Control
• BLDC PMSM low voltage motor control accessory kit
• Rashid, M. H. Power Electronics Handbook, 2nd Edition. Academic Press
• Motor Control Application Tuning (MCAT) Tool

S32M276 - Sensorless 6-step BLDC motor control

S32M276 - Sensorless 6-step BLDC motor control