s32k342 bug confirmation request

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s32k342 bug confirmation request

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GW_History
Contributor I

s32k342 bug confirmation request

Even though ADC0 Standard Channel 8 is set up normally
There is a problem reading GPIO PAD 45.

The value of ADC0 Standard Channel 8 is always the same as ADC1 Standard Channel 8.

How can I solve the problem?

Tool : S32 Design Studio for S32 Platform 3.5 

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1 Solution
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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi

Thank you for the report.
And sorry for the inconvenience we bring you!
The problem of Siul2_Port_Ip_WriteDCMConfiguration has been reported to the RTD team before. What version of S32K3 RTD are you using now? The fix version may not been released yet, so the customer needs to manually modify it temporarily.

You can see this similar discussion: S32K3_ADC_Channcal_configure_problem


Best Regards,
Robin
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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi

Thank you for the report.
And sorry for the inconvenience we bring you!
The problem of Siul2_Port_Ip_WriteDCMConfiguration has been reported to the RTD team before. What version of S32K3 RTD are you using now? The fix version may not been released yet, so the customer needs to manually modify it temporarily.

You can see this similar discussion: S32K3_ADC_Channcal_configure_problem


Best Regards,
Robin
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

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GW_History
Contributor I
Thank you for your quick reply.
I checked that it works normally after modification.
The version I am using is as follows.
SDK Version : PlatformSDK_S32k3_2022_07
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