s32k312 spi2 clock wire ouput extra pulse at begining.

[victory]

Hi Nxp,

    i am using s32k312 spi2 to send  data. and found spi2 clk line always output extra one pulse  as  pic below(blue waveform is clock line),  how's that happen. it not happened in spi1.

attached is a sample project.

[victory]

attached files

[Robin_Shen]

I tested your attached project and did not see the waveform mentioned in your screenshot(I don't see any SPI data at all). Please re-upload the test project.
In addition, why do you use PTE11 as GPIO(PCS) instead of configuring PTE11 as lpspi2_pcs0?

Also, why call IP_LPSPI_2->TCR |= speed << 27; instead of using the S32 Configuration Tool to configure SpiBaudrate?

It is recommended to refer to the Lpspi_Flexio_Ip_Transfer_S32K344, Lpspi_Ip_HalfDuplexTransfer_S32K344 projects in S32K3 RTD 4.0.0 or Example S32K312 SPI Transmit & Receive Using DMA DS3.5 RTD300

[victory · Accepted solution]

1. sck pull-up resistor cause this problem.
2. spi-sd need send data with CS high, so manually control cs instead of lpspi2_pcs0.

[judith75hodges]

Hello,

The extra clock pulse on the SPI2 clock line is definitely interesting, especially since it doesn’t happen on SPI1. This could be caused by a configuration mismatch in SPI2 settings, such as clock polarity, phase, or transfer mode. It’s also worth checking if SPI2 handles idle states differently or if there’s a subtle difference in how the driver or SDK is managing it. Hardware issues like signal integrity could also play a role, though it’s less likely.