s32k-HOW TO HARDFAULT

[jack-joker]

Hello, after I configured the Mcal generated by EB to the compiler, a hardfauld error occurred during the run, and I found the SPI_INIT, but I couldn't solve it.
Thank you

[VaneB]

Hi @jack-joker 

Could you please provide more information such as the settings you made and the implementation? Also, bedug further in Spi_Init() function to find out which line is stucked and causing this issue.

BR, VaneB

[jack-joker]

thank you for your report By search for that. It’s (Base>FCR=LPSPI_FCR_TXWATER((uint32)LPSPI_IP_FIFO_SIZE_U8-(uint32)2u);).it this line which casing to hard fault@VaneB

Thank you

Jack-joker

[VaneB]

Hi @jack-joker 

Could you please provide more information such as the configurations you made?

[jack-joker]

that is all about my configure about SPI1 

thank you!

[VaneB]

Hi @jack-joker 

I have a question. Which S32K derivative are you using? Also, in the SpiPhyUnitClockRef the name of the SPI clock source configuration seems to be "SPI1", but you are configuring the LPSPI0, could you confirm if the clock configuration is the one corresponding to the SPI instance? The discrepancy in the name confused me.

[jack-joker]

I commented these three lines of code and it worked

This is the configuration to which one is associated

Thank you！

[VaneB]

Hi @jack-joker 

There is no relation between these 3 lines of code; the first one enables the SPI to work in debug mode, the second one configures some main fields of the SPI and the last one corresponds to the transmit FIFO watermark.

Previously, you said that the hard faul was caused at Base>FCR=LPSPI_FCR_TXWATER((uint32)LPSPI_IP_FIFO_SIZE_U8-(uint32)2u), but with the current information but could you please verify if the fault is not caused by the the configurations set in the second line of code?

[jack-joker]

@VaneBI'm able to determine which line is the result of one of these three lines of code, and I'll have to verify it tomorrow

Tank you!