emac_mii_rmii_tx clock question

[cszhang]

the screen shot is from lwip_baremetal_s32k344.mex, is the emac_mii_rmii_tx  from the switch MII_TX_CLK?

[PetrS · Accepted solution]

Hi,

lwip_baremetal_s32k344 example configure xMII interface for RMII mode so emac_mii_rmii_tx is input and is expecting 50MHz reference clock (that's why there is a /2 divider).

On switch, like SJA1110, RMII REF_CLK functionality is available on pins MIIx_RX_CLK or MIIx_TX_CLK and can be software selected for flexibility.

BR, Petr