eFlexPWM waveform generation issue

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

eFlexPWM waveform generation issue

877 Views
xingyun
Contributor II

I want to achieve 6-channel PWM complementary wave generation, but with the following configuration, even though all 6 pins on the chip are connected, there is no waveform output.
After enabling PWM, the output on the board is completely noise-free. Could you please help me identify where my problem lies? Thank you all very much.

I don't know why the images won't display. Let me first describe my configuration.

The PwmChannel has 3 sub-channels (0/1/2). The Clock Source Selection in the FlexPwmSubModules is all set to FLEXPWM_IP_CLKSOURCE_PERIPHERAL_CLK. Initialization Control Selection are MASTER_RELOAD, MASTER_SYNC, and MASTER_SYNC respectively. Reload Source Selection and Force Source Selection are both set to MASTER.

In each Sub, there is only the PWMA (Phase-Weighted Magnitude) and the edge-symmetric mode.

In each Sub, there is only PWMA (Phase-Weighted Magnitude) and the edge-symmetric mode. Channel Output in fault, stop, and debug modes is LOGIC_0. In the "FaultSettings", select all options from 0 to 3. The Fault Level of Fault0 to Fault3 is all at LOW.

Please help me figure out why no waves are generated at the chip area.

 

0 Kudos
Reply
3 Replies

805 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

I can recommend to start with available "FlexPWM_Pwm_Ip_Example_S32K396" RTD demo example. It show FlexPWM independent configuration on single submodule, but you can easily modify it to complementary functionality on several submodules. This is a setting I used to modify add submodules 0 and 1 to generate complimentary signals on its PWMA/PWMB outputs. image.pngimage.png

image.png

Below is respective output signals after FlexPwm_Ip_Init is called

image.png

image.png

You can add another pins and submodule and set it accordingly to submodule 1

Hope it helps.

BR, Petr

0 Kudos
Reply

803 Views
xingyun
Contributor II

Thank you very much for your reply. I am now able to send waves. However, there is still one issue at present. My Default Period is 16000, the clock CORE_CLK is 160 MHz, and it is in the edge-triggered mode. I wanted to obtain a PWM with a frequency of 10K, but what I actually got was 2.4KHz.

0 Kudos
Reply

797 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

I do not see issue here. With setting 

 
 
0 Kudos
Reply
%3CLINGO-SUB%20id%3D%22lingo-sub-2324574%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3EeFlexPWM%20waveform%20generation%20issue%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2324574%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EI%20want%20to%20achieve%206-channel%20PWM%20complementary%20wave%20generation%2C%20but%20with%20the%20following%20configuration%2C%20even%20though%20all%206%20pins%20on%20the%20chip%20are%20connected%2C%20there%20is%20no%20waveform%20output.%3CBR%20%2F%3EAfter%20enabling%20PWM%2C%20the%20output%20on%20the%20board%20is%20completely%20noise-free.%20Could%20you%20please%20help%20me%20identify%20where%20my%20problem%20lies%3F%20Thank%20you%20all%20very%20much.%3C%2FP%3E%3CP%3EI%20don't%20know%20why%20the%20images%20won't%20display.%20Let%20me%20first%20describe%20my%20configuration.%3C%2FP%3E%3CP%3EThe%20PwmChannel%20has%203%20sub-channels%20(0%2F1%2F2).%20The%20Clock%20Source%20Selection%20in%20the%20FlexPwmSubModules%20is%20all%20set%20to%20FLEXPWM_IP_CLKSOURCE_PERIPHERAL_CLK.%20Initialization%20Control%20Selection%20are%20MASTER_RELOAD%2C%20MASTER_SYNC%2C%20and%20MASTER_SYNC%20respectively.%20Reload%20Source%20Selection%20and%20Force%20Source%20Selection%20are%20both%20set%20to%20MASTER.%3C%2FP%3E%3CP%3EIn%20each%20Sub%2C%20there%20is%20only%20the%20PWMA%20(Phase-Weighted%20Magnitude)%20and%20the%20edge-symmetric%20mode.%3C%2FP%3E%3CP%3EIn%20each%20Sub%2C%20there%20is%20only%20PWMA%20(Phase-Weighted%20Magnitude)%20and%20the%20edge-symmetric%20mode.%20Channel%20Output%20in%20fault%2C%20stop%2C%20and%20debug%20modes%20is%20LOGIC_0.%20In%20the%20%22FaultSettings%22%2C%20select%20all%20options%20from%200%20to%203.%20The%20Fault%20Level%20of%20Fault0%20to%20Fault3%20is%20all%20at%20LOW.%3C%2FP%3E%3CP%3EPlease%20help%20me%20figure%20out%20why%20no%20waves%20are%20generated%20at%20the%20chip%20area.%3C%2FP%3E%3CBR%20%2F%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2324935%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20eFlexPWM%20waveform%20generation%20issue%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2324935%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHi%2C%3C%2FP%3E%0A%3CP%3EI%20do%20not%20see%20issue%20here.%20With%20setting%26nbsp%3B%3C%2FP%3E%0A%3CDIV%20id%3D%22tinyMceEditor_b4e9b901561a5PetrS_0%22%20class%3D%22mceNonEditable%20lia-copypaste-placeholder%22%3E%26nbsp%3B%3C%2FDIV%3E%0A%3CDIV%20id%3D%22tinyMceEditorPetrS_0%22%20class%3D%22mceNonEditable%20lia-copypaste-placeholder%22%3E%26nbsp%3B%3C%2FDIV%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2324916%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20eFlexPWM%20waveform%20generation%20issue%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2324916%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EThank%20you%20very%20much%20for%20your%20reply.%20I%20am%20now%20able%20to%20send%20waves.%20However%2C%20there%20is%20still%20one%20issue%20at%20present.%20My%20Default%20Period%20is%2016000%2C%20the%20clock%20CORE_CLK%20is%20160%20MHz%2C%20and%20it%20is%20in%20the%20edge-triggered%20mode.%20I%20wanted%20to%20obtain%20a%20PWM%20with%20a%20frequency%20of%2010K%2C%20but%20what%20I%20actually%20got%20was%202.4KHz.%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-2324894%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%20translate%3D%22no%22%3ERe%3A%20eFlexPWM%20waveform%20generation%20issue%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-2324894%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EHi%2C%3C%2FP%3E%0A%3CP%3EI%20can%20recommend%20to%20start%20with%20available%20%22FlexPWM_Pwm_Ip_Example_S32K396%22%20RTD%20demo%20example.%20It%20show%20FlexPWM%20independent%20configuration%20on%20single%20submodule%2C%20but%20you%20can%20easily%20modify%20it%20to%20complementary%20functionality%20on%20several%20submodules.%20This%20is%20a%20setting%20I%20used%20to%20modify%20add%20submodules%200%20and%201%20to%20generate%20complimentary%20signals%20on%20its%20PWMA%2FPWMB%20outputs.%26nbsp%3B%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20940px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20940px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F378085iBD4031C3D1CA6B8B%2Fimage-size%2Flarge%3Fv%3Dv2%26amp%3Bpx%3D999%22%20role%3D%22button%22%20title%3D%22image.png%22%20alt%3D%22image.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20892px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20892px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F378086i3E764DA257282B7A%2Fimage-size%2Flarge%3Fv%3Dv2%26amp%3Bpx%3D999%22%20role%3D%22button%22%20title%3D%22image.png%22%20alt%3D%22image.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3C%2FP%3E%0A%3CP%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20957px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20957px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F378087i73F385A43324D6B6%2Fimage-size%2Flarge%3Fv%3Dv2%26amp%3Bpx%3D999%22%20role%3D%22button%22%20title%3D%22image.png%22%20alt%3D%22image.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3C%2FP%3E%0A%3CP%3EBelow%20is%20respective%20output%20signals%20after%26nbsp%3B%3CSPAN%3EFlexPwm_Ip_Init%20is%20called%3C%2FSPAN%3E%3C%2FP%3E%0A%3CP%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20982px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20982px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F378088iBF262D074BFFB548%2Fimage-size%2Flarge%3Fv%3Dv2%26amp%3Bpx%3D999%22%20role%3D%22button%22%20title%3D%22image.png%22%20alt%3D%22image.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3C%2FP%3E%0A%3CP%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20941px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22image.png%22%20style%3D%22width%3A%20941px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F378089i4C825D252503F020%2Fimage-size%2Flarge%3Fv%3Dv2%26amp%3Bpx%3D999%22%20role%3D%22button%22%20title%3D%22image.png%22%20alt%3D%22image.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3C%2FP%3E%0A%3CP%3EYou%20can%20add%20another%20pins%20and%20submodule%20and%20set%20it%20accordingly%20to%20submodule%201%3C%2FP%3E%0A%3CP%3EHope%20it%20helps.%3C%2FP%3E%0A%3CP%3EBR%2C%20Petr%3C%2FP%3E%3C%2FLINGO-BODY%3E