code can not get data from no_cache ram if source code runs in ITCM

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code can not get data from no_cache ram if source code runs in ITCM

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yin_qiu
Contributor III

hello NXP experts:

I met a question about RAM access.

I modify the link file and locate all the source code in ITCM (all the hex is located from 0x00000000) and I take use of SPI and DMA to communicate with the external device.

when I set the value in global ram and trigger DMA transmit, there is no data in MTSR PIN, if I set a breakpoint after RAM data setting but before DMA transfer. there will be data in MTSR.

so I guess the root cause may be the ram refresh because ITCM runs high frequency than SRAM .

you can check the two pic below, if I go from breakpoint 1 to breakpoint 2 ,there is no contents in the MTSR(orange color)

1.png2.png

 

you can check the two pictures below and if I go from breakpoint 1 to breakpoint 2 to breakpoint 3(I just do a stop between breakpoint 1 and breakpoint 3) .

there is contents in the MTSR(orange color).

do you have any solution for this problem .thanks a lot

3.png4.png

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