Why is the data received by LPSPI from the slave out of order?

[kalvin]

One of the two MCUs is the master and the other is the slave. The master starts DMA sending/receiving every 5ms and triggers the slave to start DMA receiving/sending through the external interrupt signal (IND).

void MainFunctionRun(void)
{
if(!Task_Delay[0])
{
Task_Delay[0] = 5; //loop every 5ms

SpiMaster_EmitInd(PTE,IND);

DMA_Start(SPI_DMA_RX_CH,SPI_DMA_TX_CH); //master start DMA for spi
}
}

void PORTE_IRQHandler(void)
{
if(((PTE->PDIR >> IND) & 1) == 0) //slave received IND signal
{
DMA_Start(SPI_DMA_RX_CH,SPI_DMA_TX_CH); //slave start DMA for spi
}
else if(((PTE->PDIR >> ACK) & 1) == 0) //no use
{
}
PORTE->ISFR |= (1<<IND)|(1<<ACK);
}

[davidtosenovjan]

Such effect are usually caused by overflow/underflow condition. How you are triggering DMA transfer on the slave side?

[kalvin]

In the above code fragment PORTE_IRQHandler, before the master DMA starts, the IND signal will be sent to the slave to trigger the slave DMA reception.

[davidtosenovjan]

It is unusual approach. It is needed to route DMA request directly from LPSPI to DMA module (with using of DMAMUX)

[kalvin]

@davidtosenovjan any new answers ?

[kalvin]

I also used DMAMUX @davidtosenovjan .

static void DMAMUX_Init(LPSPI_Type *Instance,uint8_t rxch,uint8_t txch)
{
uint32_t DMA_CH_RX_MUX_NUM = 0; 
if(Instance == LPSPI0) DMA_CH_RX_MUX_NUM = 14;                                //using LPSPI0
if(Instance == LPSPI1) DMA_CH_RX_MUX_NUM = 16;
if(Instance == LPSPI2) DMA_CH_RX_MUX_NUM = 18;

SIM->PLATCGC |= SIM_PLATCGC_CGCDMA(1); 
PCC->PCCn[PCC_DMAMUX_INDEX] |= PCC_PCCn_CGC_MASK; 

/* DMA Channel 4 for LPSPI RX */
DMAMUX->CHCFG[rxch] &= ~ DMAMUX_CHCFG_ENBL(1); 
DMAMUX->CHCFG[rxch] |= DMAMUX_CHCFG_SOURCE(DMA_CH_RX_MUX_NUM); //14
DMAMUX->CHCFG[rxch] |= DMAMUX_CHCFG_ENBL(1); 
/* DMA Channel 5 for LPSPI TX */
DMAMUX->CHCFG[txch] &= ~ DMAMUX_CHCFG_ENBL(1); 
DMAMUX->CHCFG[txch] |= DMAMUX_CHCFG_SOURCE(DMA_CH_RX_MUX_NUM+1); //14+1
DMAMUX->CHCFG[txch] |= DMAMUX_CHCFG_ENBL(1); 
}