I run FlexCAN transmit and receive in parallel continuously. If I configure the receive to use FIFO and DMA after some point the transmission stops. It looks like the transmission was started but I get no interrupt from the transmit mailbox. If I configure the receive to use mailbox or FIFO without DMA everything works fine. Is this something that anyone saw before?
And... I think I've found the problem. The function FLEXCAN_SetMsgBuffIntCmd in flexcan_hw_access.c does read-modify-write on IMASKx registers without protection (same issue may be with some other functions and registers). It is called from program level and also from interrupt which is not safe. It gets worse for me as I'm running multiple threads and this is not thread-safe either.
This is with SDK 3.0.2 and with FreeRTOS. What I've found at this point is that when the TX stops working the IMASK bit corresponding to the mailbox is clear while the IFLAG bit is set and the status tells me that transmission has started. I'm not sure as yet how the IMASK bit gets cleared (or not get set).
