Dear Technical Support Team,
I am writing to report an anomaly observed during ADC data acquisition debugging on an S32K312 microcontroller using the Adc_TS_T40D34M20I2R0 MCAL package (SW32K3_RTD_4.4_2.0.2_D2211). The issue pertains to the incorrect definition of the Last Channel in the ADC instance, specifically affecting DMA buffer population under specific configurations.
Issue Description
Configuration Context:
- Trigger Mode: Hardware-triggered conversion via Timer (1-second interval).
- Data Transfer: DMA-based data transport without interrupt (DMA interrupt handles data movement).
- Channel Setup: Configured multiple channels, with the last channel indexed as Channel 72 (as per EB28.2 configuration).
Observed Behavior:
- The first channel index in the configuration fails to populate the designated DMA buffer, despite the PCDR register confirming successful data acquisition (register values match expected analog inputs).
- Debugging reveals that the function Adc_Ipw_CalculateLastChan() — responsible for determining the last converted channel — consistently returns AdcResultLastCh.AdcChnIdx = 0 instead of the expected 72.
Root Cause Analysis:
- In the function Adc_Ipw_CalculateLastChan() (invoked as AdcResultLastCh = Adc_Ipw_CalculateLastChan(Group, ConversionType, CoreId);):
- The initialization of AdcChnIdx defaults to 0 and never updates to reflect the configured last channel (Channel 72).
Subsequent logic (e.g., DMA buffer assignment) erroneously treats Channel 0 as the last channel, causing data for Channel 72 to be skipped in the buffer.


4. Code Modification:
Revised Adc_Ipw_CalculateLastChan() to initialize AdcChnIdx with the configured LastCh value (72) instead of 0.
AdcChnIdx = ConfigPtr->LastCh; // Directly use configured last channel index