Selecting the FDIV value for FLASH in

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Selecting the FDIV value for FLASH in

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Sourdev
Contributor II

My question is about selecting the FDIV value for FLASH.

I am using the FEE(FLL Engaged External) Mode. 

External Osc = 16MHz

RDIV = 512

Input to the FLL = 16MHz / 512 = 31250

FLL Output = 31250 * 1024 = 32MHz

but I want a 40MHz core clock, So I set BUSDIV bit before changing ICS_C2[BDIV]=0x000. As given in the reference manual.

Sourdev_0-1678097466011.png

After doing this, we get Core clock = 40Mhz and Bus/FLASH clock = 20MHz. 

Sourdev_2-1678097778678.png

Can we use FDIV = 0x13 value? Because in the reference manual, there is one NOTE which tells not to use maximum value. Which value we are considering too High  = 0x13 or FDIV[5:0] 2^6 = 64?

Sourdev_4-1678099341410.png

So is it safe to use FLASH for 20MHz? 

 

 

 

 

 

 

 

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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Sourdev,

If you are using FRDM-KEAZ64Q64(S9KEAZ64AMLH), please note that you should read KEA128RM and S9KEA128P80M48SF0.

Notice: In FEE mode, FLL output frequency = OSC/RDIV *1280.

ICS_FLL_MFactor 1280.png

For that NOTE, configure FTMRE_FCLKDIV[FDIV] between fNVMOP.

fNVMOP.png

You can set Core clock = 40Mhz and Bus/FLASH clock = 20MHz. 


Best Regards,
Robin
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Sourdev
Contributor II

Hi Robin_Shen,

 I am using S9KEAZN64AMLC.

In that FLL Output = (OSC/RDIV)*1024

given in (reference manual KEA64RM)

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Robin_Shen
NXP TechSupport
NXP TechSupport

If you have to use 16MHz crystal as clock source with FEE mode, then the frequency of the Core clock will be 32MHz, and the frequency of the Bus\Flash clock will be 16MHz. 

S9KEAZN64AMLC 16MHz crystal 32MHz Core.png

For 40MHz Core clock and 20MHz Bus\Flash clock, you may need to use 10MHz crystal with FEE.

S9KEAZN64AMLC 10MHz crystal 40MHz Core.png

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