S32k314 Power up and Power down sequencing

[ajnas-c]

Hi,

Anyone please let me know the recommended S32k314 Power up and Power down sequencing timing diagram.

VDD_HV_A, VDD_HV_B, V15, V11, V25

Regards,

Ajnas

[davidtosenovjan]

The device keep MCU in POR reset in any of used voltage is below LVR level (1.1V, 2.5V, VDD_HV_A and VDD_HV_B) so basically there is no power sequencing defined.

MCU will leave POR state when all the POR sources clear.

[ajnas-c]

My question is, which voltage needs to come first to the MCU, when we power the S32K314?
Are there any timing requirements, all voltages come first, is there any problem?
Please clarify the same.

[davidtosenovjan]

There is only defined ramp rate and a monotonicity requirement but no power rail ramp ordering or differential voltages between power rails is defined so it should not matter. LVD circuits keep the device in the safe state (i.e. in reset) until all voltage rails are valid.

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