S32k312 WatchDog Reset Reason Not Be Catched In RTD3 MCAL

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S32k312 WatchDog Reset Reason Not Be Catched In RTD3 MCAL

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kontroller
Contributor III

I am developing the bootloader of s32k312 under the environment of SDS3.5 software RTD300, and found that after SWT0 triggered the reset of the chip, the reset I read in the boot was PowerOnReset instead of SWT0_RESET.

What's more strange is that, I can do this in RTD200-MCAL and RTD300-Driver, but only RTD300-MCAL has this problem.

I want to know how to fix this problem in RTD300-MCAL

I packaged the three control projects in zip files, and the control results are shown in the figure:

rtd3_driver.pngrtd3_mcal.pngrtd2_mcal.png

 

code:

extern Power_Ip_ResetType Power_Ip_GetResetReason(void);

void Wdg_CallBackNotification0(void)
{
format_print("swt0 interrupt callback \r\n");
}
int main(void) {

uint8 temp_rstrsn = 0U;

Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);
Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS0,g_pin_mux_InitConfigArr0);

IntCtrl_Ip_InstallHandler(SWT0_IRQn, Swt_Ip_Swt0_Isr, NULL_PTR);
IntCtrl_Ip_EnableIrq(SWT0_IRQn);

Lpuart_Uart_Ip_Init(LPUART_UART_IP_INSTANCE_USING_6, &Lpuart_Uart_Ip_xHwConfigPB_6);


format_print("==========================================================\r\n");
format_print("s32k312_rtd300_swt0_reset_ip_test:\r\n");

temp_rstrsn = Power_Ip_GetResetReason();
format_print("reset reason: %d \r\n",temp_rstrsn);

Swt_Ip_Init(SWT_INST,&Swt_Ip_Cfg0);

while (1) {
}

return exit_code;
}

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1 Solution
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kontroller
Contributor III

I finally found a solution to this problem, it is required to turn on the PLL peripheral clock under RTD-MCAL, it is not required under RTD-DRIVER, although I do not understand why yet, thank you very much to the forum experts

kontroller_0-1713150009091.png

 

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1 Reply
2,035 Views
kontroller
Contributor III

I finally found a solution to this problem, it is required to turn on the PLL peripheral clock under RTD-MCAL, it is not required under RTD-DRIVER, although I do not understand why yet, thank you very much to the forum experts

kontroller_0-1713150009091.png

 

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%3CLINGO-SUB%20id%3D%22lingo-sub-1846547%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ES32k312%20WatchDog%20Reset%20Reason%20Not%20Be%20Catched%20In%20RTD3%20MCAL%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1846547%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EI%20am%20developing%20the%20bootloader%20of%20s32k312%20under%20the%20environment%20of%20SDS3.5%20software%20RTD300%2C%20and%20found%20that%20after%20%3CSTRONG%3ESWT0%3C%2FSTRONG%3E%20triggered%20the%20reset%20of%20the%20chip%2C%20the%20reset%20I%20read%20in%20the%20boot%20was%20%3CSTRONG%3EPowerOnReset%3C%2FSTRONG%3E%20instead%20of%20%3CSTRONG%3ESWT0_RESET%3C%2FSTRONG%3E.%3C%2FP%3E%3CP%3EWhat's%20more%20strange%20is%20that%2C%20I%20can%20do%20this%20in%3CFONT%20color%3D%22%2399CC00%22%3E%3CSTRONG%3E%20RTD200-MCAL%3C%2FSTRONG%3E%3C%2FFONT%3E%20and%20%3CFONT%20color%3D%22%2399CC00%22%3E%3CSTRONG%3ERTD300-Driver%3C%2FSTRONG%3E%3C%2FFONT%3E%2C%20but%20only%20%3CFONT%20color%3D%22%23FF6600%22%3E%3CSTRONG%3ERTD300-MCAL%3C%2FSTRONG%3E%3C%2FFONT%3E%20has%20this%20problem.%3C%2FP%3E%3CP%3EI%20want%20to%20know%20how%20to%20fix%20this%20problem%20in%26nbsp%3B%3CFONT%20color%3D%22%23FF6600%22%3E%3CSTRONG%3ERTD300-MCAL%3C%2FSTRONG%3E%3C%2FFONT%3E%3C%2FP%3E%3CP%3EI%20packaged%20the%20three%20control%20projects%20in%20zip%20files%2C%20and%20the%20control%20results%20are%20shown%20in%20the%20figure%EF%BC%9A%3C%2FP%3E%3CP%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22rtd3_driver.png%22%20style%3D%22width%3A%20572px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22rtd3_driver.png%22%20style%3D%22width%3A%20572px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F273587i85664D2FD3E567E4%2Fimage-size%2Flarge%3Fv%3Dv2%26amp%3Bpx%3D999%22%20role%3D%22button%22%20title%3D%22rtd3_driver.png%22%20alt%3D%22rtd3_driver.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22rtd3_mcal.png%22%20style%3D%22width%3A%20512px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22rtd3_mcal.png%22%20style%3D%22width%3A%20512px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F273588iB7FB507FBC92F2C7%2Fimage-size%2Flarge%3Fv%3Dv2%26amp%3Bpx%3D999%22%20role%3D%22button%22%20title%3D%22rtd3_mcal.png%22%20alt%3D%22rtd3_mcal.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22rtd2_mcal.png%22%20style%3D%22width%3A%20537px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22rtd2_mcal.png%22%20style%3D%22width%3A%20537px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F273590iCB6879BA1C6BBAB1%2Fimage-size%2Flarge%3Fv%3Dv2%26amp%3Bpx%3D999%22%20role%3D%22button%22%20title%3D%22rtd2_mcal.png%22%20alt%3D%22rtd2_mcal.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3C%2FP%3E%3CBR%20%2F%3E%3CP%3Ecode%3A%3C%2FP%3E%3CP%3Eextern%20Power_Ip_ResetType%20Power_Ip_GetResetReason(void)%3B%3C%2FP%3E%3CP%3Evoid%20Wdg_CallBackNotification0(void)%3CBR%20%2F%3E%7B%3CBR%20%2F%3Eformat_print(%22swt0%20interrupt%20callback%20%5Cr%5Cn%22)%3B%3CBR%20%2F%3E%7D%3CBR%20%2F%3Eint%20main(void)%20%7B%3C%2FP%3E%3CP%3Euint8%20temp_rstrsn%20%3D%200U%3B%3C%2FP%3E%3CP%3EClock_Ip_Init(%26amp%3BClock_Ip_aClockConfig%5B0%5D)%3B%3CBR%20%2F%3ESiul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS0%2Cg_pin_mux_InitConfigArr0)%3B%3C%2FP%3E%3CP%3EIntCtrl_Ip_InstallHandler(SWT0_IRQn%2C%20Swt_Ip_Swt0_Isr%2C%20NULL_PTR)%3B%3CBR%20%2F%3EIntCtrl_Ip_EnableIrq(SWT0_IRQn)%3B%3C%2FP%3E%3CP%3ELpuart_Uart_Ip_Init(LPUART_UART_IP_INSTANCE_USING_6%2C%20%26amp%3BLpuart_Uart_Ip_xHwConfigPB_6)%3B%3C%2FP%3E%3CP%3E%3CBR%20%2F%3Eformat_print(%22%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%3D%5Cr%5Cn%22)%3B%3CBR%20%2F%3Eformat_print(%22s32k312_rtd300_swt0_reset_ip_test%3A%5Cr%5Cn%22)%3B%3C%2FP%3E%3CP%3Etemp_rstrsn%20%3D%20Power_Ip_GetResetReason()%3B%3CBR%20%2F%3Eformat_print(%22reset%20reason%3A%20%25d%20%5Cr%5Cn%22%2Ctemp_rstrsn)%3B%3C%2FP%3E%3CP%3ESwt_Ip_Init(SWT_INST%2C%26amp%3BSwt_Ip_Cfg0)%3B%3C%2FP%3E%3CP%3Ewhile%20(1)%20%7B%3CBR%20%2F%3E%7D%3C%2FP%3E%3CP%3Ereturn%20exit_code%3B%3CBR%20%2F%3E%7D%3C%2FP%3E%3C%2FLINGO-BODY%3E%3CLINGO-SUB%20id%3D%22lingo-sub-1846664%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3ERe%3A%20S32k312%20WatchDog%20Reset%20Reason%20Not%20Be%20Catched%20In%20RTD3%20MCAL%3C%2FLINGO-SUB%3E%3CLINGO-BODY%20id%3D%22lingo-body-1846664%22%20slang%3D%22en-US%22%20mode%3D%22CREATE%22%3E%3CP%3EI%20finally%20found%20a%20solution%20to%20this%20problem%2C%20it%20is%20required%20to%20turn%20on%20the%20PLL%20peripheral%20clock%20under%20RTD-MCAL%2C%20it%20is%20not%20required%20under%20RTD-DRIVER%2C%20although%20I%20do%20not%20understand%20why%20yet%2C%20thank%20you%20very%20much%20to%20the%20forum%20experts%3C%2FP%3E%3CP%3E%3CSPAN%20class%3D%22lia-inline-image-display-wrapper%20lia-image-align-inline%22%20image-alt%3D%22kontroller_0-1713150009091.png%22%20style%3D%22width%3A%20400px%3B%22%3E%3Cspan%20class%3D%22lia-inline-image-display-wrapper%22%20image-alt%3D%22kontroller_0-1713150009091.png%22%20style%3D%22width%3A%20342px%3B%22%3E%3Cimg%20src%3D%22https%3A%2F%2Fcommunity.nxp.com%2Ft5%2Fimage%2Fserverpage%2Fimage-id%2F273626i8F25F3F74DF559C1%2Fimage-size%2Fmedium%3Fv%3Dv2%26amp%3Bpx%3D400%22%20role%3D%22button%22%20title%3D%22kontroller_0-1713150009091.png%22%20alt%3D%22kontroller_0-1713150009091.png%22%20%2F%3E%3C%2Fspan%3E%3C%2FSPAN%3E%3C%2FP%3E%3CBR%20%2F%3E%3C%2FLINGO-BODY%3E