S32k148 - FTM Input Capture have issue of reading measured value as 0 randomly

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S32k148 - FTM Input Capture have issue of reading measured value as 0 randomly

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Pratap_Metharamitta
Contributor III

With the below configuration randomly input capture value we are reading as 0, though the encoder signal is clean and strong.

ftm_input_ch_param_t Ftm3InputCaptureChannelsConfig[] =

{

{

CHAN4_IDX, /* hwChannelId */

FTM_SIGNAL_MEASUREMENT, /* inputMode */

FTM_RISING_EDGE, /* edgeAlignement */

FTM_PERIOD_ON_MEASUREMENT, /* measurementType */

0, /* filterValue */

false, /* filterEn */

false, /* continuousModeEn */

NULL, /* channelsCallbacksParams */

NULL /* channelsCallbacks */

},

};

One observation is on Ch5 we are seeing interrupt on the rising edge though it is configured as falling edge.

Pratap Metharamitta
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Robin_Shen
NXP TechSupport
NXP TechSupport

You don't need to connect signal at CH5.

Dual Edge Capture Mode.png

FTM_DRV_InitMeasurement enable the channel (n+1) CHIE = 1

It should call "FTM_DRV_InputCaptureHandler" only when we have falling edge in the CH5.
Would you please set breakpoint to check the register value CHIE\ELSB:ELSA of CH4 and CH5?

FTM_DRV_InitMeasurement.png

Even if first_event_time and second_event_time have same time counts, the measurementResults[channel] should be ftmModValue.

FTM_DRV_InputCaptureHandler.png

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Pratap_Metharamitta
Contributor III

In our case PTD3 and PTD4 are configured as below:

 

{
 PORTD,
 2u,
 PORT_INTERNAL_PULL_NOT_ENABLED,
 false,
 PORT_LOW_DRIVE_STRENGTH,
 PORT_MUX_ALT2,
 false,
 PORT_DMA_INT_DISABLED,
 false,
 false,
 PTD,
 GPIO_UNSPECIFIED_DIRECTION,
 0u,
},

{
 PORTD,
 3u,
 PORT_INTERNAL_PULL_NOT_ENABLED,
 false,
 PORT_LOW_DRIVE_STRENGTH,
 PORT_PIN_DISABLED,
 false,
 PORT_DMA_INT_DISABLED,
 false,
 false,
 PTD,
 GPIO_UNSPECIFIED_DIRECTION,
 0u,
}

 

When we try to probe PTD3 we are getting interrupts on the "FTM_DRV_InputCaptureHandler".

Are we not supposed to connect any signal to the PTD3 while we are using PTD2 in the Duel Edge Input Capture mode?

Pratap Metharamitta
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Robin_Shen
NXP TechSupport
NXP TechSupport

I test ic_pal_s32k148 example on S32K148EVB. Connect signal on PTD15(FTM0_CH0) will run into FTM_DRV_InputCaptureHandler. Connect signal on PTD16(FTM0_CH1) will not run into FTM_DRV_InputCaptureHandler. 

FTM_DRV_InputCaptureHandler PTD16.png

Please check the value of PORT_PCR PTD16. If you don't use channel n+1 pin, the S32DS will not generate codes for this pin.

Generate array of configured pin structures.png

I don't know why you have below codes:

{
 PORTD,
 3u,
 PORT_INTERNAL_PULL_NOT_ENABLED,
 false,
 PORT_LOW_DRIVE_STRENGTH,
 PORT_PIN_DISABLED,
 false,
 PORT_DMA_INT_DISABLED,
 false,
 false,
 PTD,
 GPIO_UNSPECIFIED_DIRECTION,
 0u,
}

 

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Pratap_Metharamitta
Contributor III

Thank you for quick test and response.

As per our R&D standards in the embedded team we make sure all the PINs must have configured to desired state, so this pin PTD3(FTM3_CH5) is not used and hence configured as "PORT_PIN_DISABLED".

For testing we removed this the array and there is no change in the behavior.

In current implementation we are good with Input Capture on Duel Edge by connecting only PTD2(FTM3_CH4) and PTD3(FTM3_CH5) to Ground.

We planning to have Encoder signal connected to both PTD2(FTM3_CH4) and PTD3(FTM3_CH5), if required we will use GPIO Interrupt on edges to compute the ON/OFF time of encoder (as a backup).

When we have PTD3(FTM3_CH5) connected to the Encoder Signal though we configured or not this PRD2 in the pins mux randomly (with in one hour execution 10 times) we are hitting "FTM_DRV_InputCaptureHandler" and at that time we are seeing  error_count is incrementing (below code add in the "FTM_DRV_InputCaptureHandler" for testing):

 

 

        // Toggle the Pin PORT-E10 upon CH4 and CH5 Timer counts are same.
        if (first_event_time == second_event_time){
            error_count++;
            if (toggle_sp0){
                toggle_sp0 = false;
                PTD->PCOR |= 1<<28;
            }else{
                toggle_sp0 = true;
                PTD->PSOR |= 1<<28;
            }
        }

 

 

Same is not hitting when we are not connected this PTD3(FTM3_CH5) for 24hrs of execution.

As per the Reference manual PTD3(FTM3_CH5) will be ignored, but that is not the case here.

We need NXP thoughts on this PTD3(FTM3_CH5) encoder signal connected with pin not configured in recommended or not.

Also find the attached waveform:

scope_15.png

CH4 and CH5 are Encoder Signal, INT is GPIO Toggle and TRIGGER is Error Toggle in the "FTM_DRV_InputCaptureHandler".

Here is the modified  "FTM_DRV_InputCaptureHandler" code:

 

static void FTM_DRV_InputCaptureHandler(uint32_t instance,
                                        uint8_t channelPair)
{
    DEV_ASSERT(instance < FTM_INSTANCE_COUNT);
    DEV_ASSERT(channelPair < (FEATURE_FTM_CHANNEL_COUNT >> 1U));

    ftm_state_t * state = ftmStatePtr[instance];
    FTM_Type * ftmBase = g_ftmBase[instance];
    uint8_t channel = (uint8_t)(channelPair << 1U);

    // Toggle Pin PORT-D24 upon interrupt (Named INT in the capture)
    if (toggle_sp1){
        toggle_sp1 = false;
        PTB->PCOR |= 1<<16;
    }else{
        toggle_sp1 = true;
        PTB->PSOR |= 1<<16;
    }

    /* Verify the mode for current pair of channels */
    if (FTM_DRV_GetDualEdgeCaptureBit(ftmBase, channelPair))
    {
        /* Dual edge input capture case */
        uint16_t first_event_time = FTM_DRV_GetChnCountVal(ftmBase, channel);
        uint16_t second_event_time = FTM_DRV_GetChnCountVal(ftmBase, (uint8_t)(channel + 1U));
        if (second_event_time <= first_event_time)
        {
            /* Measurement when overflow occurred */
            state->measurementResults[channel] = (uint16_t)(second_event_time + (FTM_DRV_GetMod(ftmBase) - first_event_time));
        }
        else
        {
            /* Measurement when overflow doesn't occurred */
            state->measurementResults[channel] = (uint16_t)(second_event_time - first_event_time);
        }

        /* Clear flags for channels n and n+1 */
        FTM_DRV_ClearChnEventFlag(ftmBase, channel);
        FTM_DRV_ClearChnEventFlag(ftmBase, (uint8_t)(channel + 1U));

        // Toggle the Pin PORT-E10 upon CH4 and CH5 Timer counts are same.
        // Named TIGGER in the Capture
        if (first_event_time == second_event_time){
            error_count++;
            if (toggle_sp0){
                toggle_sp0 = false;
                PTD->PCOR |= 1<<28;
            }else{
                toggle_sp0 = true;
                PTD->PSOR |= 1<<28;
            }
        }

        encoder_val[encoder_index++] = state->measurementResults[channel];
        if (encoder_index >= ENCODER_ARRAY_MAX){ encoder_index = 0U;}
    }
    else
    {
        /* To get the channel interrupt source the both channels flag must be checked */
        if (false == FTM_DRV_HasChnEventOccurred(ftmBase, channel))
        {
            channel++;
        }

        /* Get the time stamp of the event */
        state->measurementResults[channel] = FTM_DRV_GetChnCountVal(ftmBase, channel);
        /* Clear the flag for C(n+1) channel */
        FTM_DRV_ClearChnEventFlag(ftmBase, channel);
    }

    /* If the callback is defined to use it */
    if (((state->channelsCallbacks[channel]) != NULL) && (state->enableNotification[channel] == true))
    {
        state->channelsCallbacks[channel](IC_EVENT_MEASUREMENT_COMPLETE, state->channelsCallbacksParams[channel]);
    }
}

 

Pratap Metharamitta
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Robin_Shen
NXP TechSupport
NXP TechSupport

Sorry for the delay!


Please check the value of PORT_PCR PTD3. 


I try to add PTD16 into g_pin_mux_InitConfigArr0, did not find the issue on ic_pal_s32k148 example.

g_pin_mux_InitConfigArr0.png
Your code structure looks different from the pin_settings_config_t of the SDK. Would you please let me know the version of your SDK?

g_pin_mux_InitConfigArr0 PTD3.png

You can also attach your test project, so that I can direct test it.

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Pratap_Metharamitta
Contributor III

We are using "Release Name: S32 Version: 3.0.3, Software Development Kit (S32 SDK)".

We are testing with our project, let me generate the test project with SDK and share with you.

Pratap Metharamitta
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Robin_Shen
NXP TechSupport
NXP TechSupport

FTM_SIGNAL_MEASUREMENT configure FTM as dual edge input capture(Dual Edge Capture Mode).

FTM_SIGNAL_MEASUREMENT dual edge input capture.png

Check the channel ID need to even number in the measurement mode.

FTM_SIGNAL_MEASUREMENT channel ID need to even number.png

Best Regards,
Robin
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Pratap_Metharamitta
Contributor III

Thank you for quick response.

Though FTM configure as dual edge capture mode in the:

static status_t FTM_DRV_InitMeasurement(uint32_t instance,
                                        uint8_t channel,
                                        bool continuousModeEn,
                                        ftm_signal_measurement_mode_t measurementType)
{
.
.
    /* Check If want to measure a pulse width or period of the signal */
    if ((FTM_PERIOD_ON_MEASUREMENT == measurementType) || (FTM_RISING_EDGE_PERIOD_MEASUREMENT== measurementType))
    {
        FTM_DRV_SetChnEdgeLevel(ftmBase, channel, 1U);
        if (FTM_PERIOD_ON_MEASUREMENT == measurementType)
        {
            /* Measure time between rising and falling edge - positive duty */
            FTM_DRV_SetChnEdgeLevel(ftmBase, (uint8_t)(channel + 1U), 2U);
        }
        else
        {
            /* If channel (n) is configured to capture falling edges (ELS(n)B:ELS(n)A = 0:1)
             * then channel (n+1) also captures falling edges (ELS(n+1)B:ELS(n+1)A = 0:1) */
            FTM_DRV_SetChnEdgeLevel(ftmBase, (uint8_t)(channel + 1U), 1U);
        }
    }
.
.
CH4 will be Rising edge and CH5 will be on the Falling edge.
 
In our case we connected CH4 and CH5 with same encoder signal and we are expecting have interrupt to call  "FTM_DRV_IrqHandler" only when we have falling edge in the CH5; but we are getting this interrupt on the rising edge, it resulting to have:
        /* Dual edge input capture case */
        uint16_t first_event_time = FTM_DRV_GetChnCountVal(ftmBase, channel);
        uint16_t second_event_time = FTM_DRV_GetChnCountVal(ftmBase, (uint8_t)(channel + 1U));
        if (second_event_time < first_event_time)
        {
            /* Measurement when overflow occurred */
            state->measurementResults[channel] = (uint16_t)(second_event_time + (FTM_DRV_GetMod(ftmBase) - first_event_time));
        }
        else
        {
            /* Measurement when overflow doesn't occurred */
            state->measurementResults[channel] = (uint16_t)(second_event_time - first_event_time);
        }

        /* Clear flags for channels n and n+1 */
        FTM_DRV_ClearChnEventFlag(ftmBase, channel);
        FTM_DRV_ClearChnEventFlag(ftmBase, (uint8_t)(channel + 1U));
 
first_event_time  and second_event_time have same time counts.
Pratap Metharamitta
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Robin_Shen
NXP TechSupport
NXP TechSupport

You don't need to connect signal at CH5.

Dual Edge Capture Mode.png

FTM_DRV_InitMeasurement enable the channel (n+1) CHIE = 1

It should call "FTM_DRV_InputCaptureHandler" only when we have falling edge in the CH5.
Would you please set breakpoint to check the register value CHIE\ELSB:ELSA of CH4 and CH5?

FTM_DRV_InitMeasurement.png

Even if first_event_time and second_event_time have same time counts, the measurementResults[channel] should be ftmModValue.

FTM_DRV_InputCaptureHandler.png

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Pratap_Metharamitta
Contributor III

Disconnected CH5, then it is working fine as expected.

Thank you for your support and valuable response.

Pratap Metharamitta
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