S32k144

[njolly]

Hi Team,

I am trying to flash the s32k144 using uart interface from a linux command line. Reffering the documentations available I could see that I could make use of the SREC format for the same. But I am not able proceed further. Have anyone worked on anything similar, which can come handy for me, in understanding the procedure?

Is anyone here familiar with any serial interface downloader utility, which can be executed from the linux command line to flash the MCU ?

I also have the boot loader source code of s32k148, with the UART interface enabled for flashing and also a JAVA based GUI utility.

Does anyone have the boot loader  for the s32144 which can be used for my MCU. If not can anyone assist me with the porting of the available s32k148 bootloader code to s32k144?

[njolly]

Hi @lukaszadrapa Thanks for you support. I am porting the bootloader code for s43k144. Right now I am facing an issue. Once I write a phrase from the SREC file into the required memory successfully, I am not able to send or receive any data through UART.

As per the bootloader code you shared for my reference, once the phrase is written successfully, an acknowledgement is sent to the user, which is not being sent in my case (tried probing the same).

Have you faced any similar issues?. Please do let me know if you require any more inputs regarding the issue.

[lukaszadrapa]

Hi @njolly 

my guess is that this is caused by read-while-write issue. When flash block is being programmed or erased, it's not possible to access this flash block. The code must run from another block (data flash) or from RAM. Program flash consists of one block only, so data flash or RAM is the only option. S32K146 and S32K148 have more program flash blocks, so there's more flexibility on those devices.

Another typical problem - I recommend to align the s-record file, so each line has data payload length 8*n (usually 16 or 24 is the best option). Smallest portion of flash which can be programmed is 8 bytes (one phrase), so it simplifies a situation when the s-record is not aligned.

Regards,

Lukas

[njolly]

Hi @lukaszadrapa 

I am trying to flash the flexnvm(code flash) starting from the address (0x10000000), as you suggested to try flashing a different section. Please guide me here if am pursuing the incorrect direction.

While trying this also, I am facing issues with uart transmission and reception after 1 successful write to the flexnvm.

Can you suggest the address from where I need to try flashing, from your expertise in the area,  to get it working properly for the s32k144 Controller.

Thanks & Regards,

Nikhil

[lukaszadrapa]

It's quite simple in case of S32K144:

- when the code is running from Code Flash, you can program FlexNVM

- when the code is running from FlexNVM, you can program Code Flash

- when the code is running from RAM, you can program both FlexNVM and Code Flash

It may be also important to disable interrupts. Or you need to ensure that all the interrupt resources are forced to RAM or to different flash block and the interrupt handlers can't access flash block which is being modified.

Regards,

Lukas

[njolly]

hi @lukaszadrapa 

I disabled all the interrupts by calling the function, DISABLE_INTERRUPTS().

I tried the 2 things as you suggest to try out.

1. Tried flashing flexram(from address 0x10000000), by running the bootloader from pflash. After successful write of the first phrase of the srec file, uart send/ recieve is not working. We confirmed that the first phrase is written properly by JTAG debugging.

2. Tried loading all the functions inside the bootloader main.c into RAM(execution from RAM is tested it using debugger). In this case, I am not able to program pflash as well as flexram.

I used the following snippet to load all the code section in the main to RAM. And verified the pc moves to the RAM addresses on execution.

#define CODE_RAM __attribute__((section(".code_ram"))).

Can you suggest the changes needed for the bootloader coder for s32k148, which is available with the "AN12218SW", to suit any of the 3 methods you suggested in your previous comment.

[lukaszadrapa]

I would need more details, not just that the UART is not working or that you can't program some flash. Is any exception triggered? What can you see in flash status register? What is the content of flash before/after flash operation?

And one more thing which comes into my mind - to avoid coherency issues, try to disable the cache memory (ENCACHE in PCCCR register) and disable speculation buffer in OCMDR0 and OCMDR1 registers - write bits 4 and 5 (OCM1 bitfield) to '1'. 

Please notice that I will be on vacation now and the rest of our team will be probably overloaded during the Christmas holidays, so expect delayed answers in next one or two weeks.

Regards,

Lukas

[njolly]

hi @lukaszadrapa 

Hi. I tried disabling cache memory and disabled speculation buffer as you suggested, but this didnt help me with the issue.

1. LMEM->PCCCR &= ~(0x00001);
2. MSCM->OCMDR[0] |= 0x0030;
3. MSCM->OCMDR[1] |= 0x0030;

I tried to check if any exception is triggered, but was not able to find CSFR and MSFR registers from the S23DS. As I understand these registers hold the fault exception status. Can you guide me how to check the same in the S32DS.
The flash status register status is the attachment with the CCIF bit set.

The current configuration is such that my bootloader resides from 0x0 and I am trying to program my application to the flexnvm at 0x10000000.
Also the contents of the memory location into which I tried to write (0x10000000) is also shown in the attachments.

The section where the code gets stuck is shown in the attachment.

Please let me know if any more additional information is required and I seek your guidance as I am new to the platform

[njolly]

hi @lukaszadrapa ,

Current configuration -

1. custom boot loader  is flashed from the address - 0x00000000

2. linker files of the application code is modified to write it to the FlexNVM location from 0x10000000.

While debugging further I had a few observations, which I would like to state here.

I saw this particular statement "FTFx_FSTAT |= FTFx_FSTAT_CCIF_MASK;"  in the function definition

"flash_drv_status_t FlashCommandSequence(const flash_ssd_config_t * pSSDConfig)", which sets the CCIF flag before the operations in the flash.

1. If the above statement is commented, even if all the functions for flash write are executed, actual write to the memory doesn't happen. I verified that the write does not happen using the jtag debugger by checking the memory address '0x10000000'. In this state, UART and all other functionalites works fine, my application in the pc receives proper ack from MCU, and sends next phrase in the SREC file, until the end of file.

2. if the above statement is executed, writing of the first phrase in the SREC file to the specified memory location happens. But after that the register reads/ UART functionalities fail.

Please let me know if any additional information is required to debug this issue.

[lukaszadrapa]

Hi @njolly 

please check this post which explains where to find core registers in the S32DS:

https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/tac-p/1741310/highlight/t...

If you commented out the clearing of CCIF, the flash operation just won't be launched. So, the problem is somehow related to the flash operation. Please try to check the source of the exception - this should move us forward.

Regards,

Lukas

[JERINJOSE]

Hi @lukaszadrapa ,

In S32DS, for S32K144 we have seen from Window > Show View > Registers view as well as Peripherals view instead of Peripheral Registers view as mentioned to find core registers in S32DS. I am not able to find the Arm_core_registers in Peripheral view & Register view. Can you please tell from where we can find the core registers.

And also please provide any details regarding CFSR register from the reference manual S32K144, if any kindly provide the section from reference manual.

[lukaszadrapa]

Which version of the S32DS do you have?

CFSR is core register, so you need to check ARM documentation - ARM Cortex-M4 Generic User Guide:

https://developer.arm.com/documentation/dui0553/b/?lang=en

[JERINJOSE]

Hi @lukaszadrapa ,

We first used the S32 Design Studio for ARM Version 2018.R1. Now we tried the S32 Design Studio for Version 2.2 and found the CFSR register in Peripheral Registers view from Window > Show menu. We generated and flashed the custom app to the location 0x1000000 by setting the configurations in bootloader file & linker file and while debugging, we observed that the Peripheral Register Values is showing as zero. The screenshorts of the CFSR register is attached below. 

Please let me know if any additional information is required to debug this issue.

[lukaszadrapa]

As I can see on the screenshot, the program counter is on entry point, so the CFSR shows reset value only which is zero.

When it fails during the programming, is the device reset? Could you check it by an oscilloscope? And if yes, try to attach a debugger after that and read RCM_SRS register. You can follow:

https://community.nxp.com/t5/S32-Design-Studio/How-attach-to-running-program/m-p/1030376/highlight/t...

Regards,

Lukas

[JERINJOSE]

Hi @lukaszadrapa ,

The screenshot that i had shared was not the right one which i was trying to convey. Attaching the updated screenshot of the CFSR register values & the stuck location.
Kindly guide us to debug the issue.

[lukaszadrapa]

Hi @JERINJOSE 

I'm afraid this screenshot doesn't help, this would require some extensive debugging to isolate the problem and to find the root cause. I would try to check each step before the failure like: I'm supposed to receive this and this data over UART - did I receive it? Then this and this should be set. Is that set? Etc...

Regards,

Lukas

[lukaszadrapa]

Hi @njolly 

first of all, S32K1 devices do not have in-built serial bootloader interface. The only option how to load an application (or bootloader or whatever) first time is JTAG/SWD interface.

Let me share what we provide:

We have RAppID bootloader but the GUI running on PC is supported by Windows only, not by Linux.
https://www.nxp.com/webapp/Download?colCode=RAPPID_BOOTLOADER_UTILITY&appType=license
Notice that we do not provide source codes for this bootloader.

Following bootloaders are supposed to be used as a quick start to develop own bootloader. It's not production code:

Application note “S32K1xx Bootloader” using UART:
https://www.nxp.com/docs/en/application-note/AN12218.pdf
https://www.nxp.com/docs/en/application-note-software/AN12218SW.zip

Application note “S32K1xx Firmware updates” discussing A/B swap and using CAN:
https://www.nxp.com/docs/en/application-note/AN12323.pdf
https://www.nxp.com/docs/en/application-note-software/AN12323SW.zip

We have demo of UDS bootloader for S12Z, S32K1xx and S32K344:
https://community.nxp.com/t5/S32K-Knowledge-Base/Unified-bootloader-Demo/ta-p/1423099

As mentioned above, all these bootloaders need to be programmed via JTAG/SWD interface.

If you are looking for production code, there are some third parties which provide flash bootloaders like:
https://www.vector.com/int/en/products/products-a-z/embedded-components/flash-bootloader/

Regards,
Lukas