S32K344 RMII Problem with GMAC driver

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S32K344 RMII Problem with GMAC driver

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MehmetFatih
Contributor I

Hello,

I am working with the S32K344 MCU and using the LAN8710A Ethernet PHY in RMII mode. My goal is to transmit data from the MCU to a PC, but I am facing issues in the process.

Setup and Observations:

  • I can access the LAN8710A registers via MDIO.
  • I have verified that the STRAP pins are correctly set for RMII mode.
  • The GMac_IP_Internal_Loopback example code runs successfully.
  • When I disable MAC_CONFIG_LOOPBACK in the EthCtrlConfigMac section of the GMac driver configuration and attempt to send data to the PC, I receive nothing.
  • When I enable Far Loopback mode on the LAN8710A, it correctly echoes back the data sent from the PC.
  • Initially, after disabling internal loopback, I observed corrupted data on the PC. Later, I found that the EMAC_MII_RMII_TX_CLK pin was floating and was not connected to a 50 MHz clock signal.
  • Even with the floating TX_CLK, I was able to receive corrupted data. However, after properly connecting the TX_CLK to 50 MHz, I can no longer receive any data at all.
  • One unusual observation: When TX_CLK was not connected, I could still receive some form of data, though it was corrupted.
    • For example, if I sent a packet filled with 0xFF, I would receive only 0xFF values.
    • If I sent a packet filled with 0xF0, I received a mix of 0x30 and other byte values.

Questions:

  1. What could be causing the transmission failure after properly connecting the 50 MHz TX_CLK?
  2. Is there any additional configuration required in the GMAC driver to enable external transmission?
  3. Are there any known issues or errata related to S32K344 + LAN8710A RMII mode that could explain this behavior?
  4. How was I able to receive any data at all when TX_CLK was not connected? Even though it was corrupted, it seemed to maintain a pattern related to the original data. What could be the explanation for this behavior?

Any insights or suggestions would be greatly appreciated.

Thank you!

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1,128件の閲覧回数
MehmetFatih
Contributor I

Hi Julián,

Thank you for your response. I wanted to share my findings in case anyone else encounters a similar issue.

After further debugging, I was able to resolve the problem by making two key modifications:

  1. Before calling Siul2_Port_Ip_Init, I applied the following configuration:

    IP_DCM_GPR->DCMRWF1 = (IP_DCM_GPR->DCMRWF1 & ~DCM_GPR_DCMRWF1_EMAC_CONF_SEL_MASK) | DCM_GPR_DCMRWF1_EMAC_CONF_SEL(2U);
  2. In the clock configuration, I set the dividers for EMAC_TX_CLK and EMAC_RX_CLK to 2, reducing their frequencies to 25 MHz.

After applying these changes, data transmission started working correctly.

For reference, the corrupted data issue observed when TX_CLK was not connected remains an interesting behavior, but after properly setting up the reference clocks and configuration registers, the system now operates as expected.

I hope this helps others who might face similar issues.

Best regards,
Mehmet Fatih

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1,129件の閲覧回数
MehmetFatih
Contributor I

Hi Julián,

Thank you for your response. I wanted to share my findings in case anyone else encounters a similar issue.

After further debugging, I was able to resolve the problem by making two key modifications:

  1. Before calling Siul2_Port_Ip_Init, I applied the following configuration:

    IP_DCM_GPR->DCMRWF1 = (IP_DCM_GPR->DCMRWF1 & ~DCM_GPR_DCMRWF1_EMAC_CONF_SEL_MASK) | DCM_GPR_DCMRWF1_EMAC_CONF_SEL(2U);
  2. In the clock configuration, I set the dividers for EMAC_TX_CLK and EMAC_RX_CLK to 2, reducing their frequencies to 25 MHz.

After applying these changes, data transmission started working correctly.

For reference, the corrupted data issue observed when TX_CLK was not connected remains an interesting behavior, but after properly setting up the reference clocks and configuration registers, the system now operates as expected.

I hope this helps others who might face similar issues.

Best regards,
Mehmet Fatih

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Julián_AragónM
NXP TechSupport
NXP TechSupport

Hi @MehmetFatih,

Since the LAN8710A is a third-party device, support is limited, because of this, there is no S32K344 + LAN8710A erratas or documentation.

I'm not sure what the corrupted data may indicate, since transmission was made without a clock, but are you able to analyze the signal with an oscilloscope or logic analyzer to see if the frame is being sent/received correctly after connecting the 50Mhz?

in order to configure transmission and reception, you must also configure the interrupt driver, please refer to this community post: Solved: GMAC of S32K344 Callbackfun - NXP Community.

Could you also share the connection for the reference clock?

Best regards,
Julián

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