I have a question about cmp in round robin mode. The round robin clock, RTC_CLK, high frequency limit mainly depends on facts:DAC initialization time. fRCLK < 63 / Tinitialization (it's 30us in S32K344). so RCLK should be smaller than 2.1MHz.
But, RCLK has four clock resource: SXOSC(32.768kHz). SIRC(32kHz), FIRC(the smallest value is 3MHz),FXOSC(the smallest value is 8MHz).
So, How could i get 2MHz?
i want to use cmp to detect the over current of 6 channels. but the RCLK is too long as i understand. Do I have to use an external comparator?
Hi @Neo1096,
This is specified in the RM.
I don't know the use case so I can't help with that.
Regards,
Daniel
