S32K344 IO_MUX Clarifications

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S32K344 IO_MUX Clarifications

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Vijay_Arwapally
Contributor III

With respect IO_Mux.xlx, I have  below questions:

Vijay_Arwapally_0-1645783794628.png

 

Why is the direction for LPSPI1_SIN set to O-output??

There is no mention of IMCR in port configuration? Is it required to refer and use IMCR rows for port pins whenever the pin is required to be configured as input and ignore Mscr row?

Can you please clarify the doubts?

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

this is because the SIN and SOUT pins can be configured to swap directions, so SIN can be output as well. Refer to LPSPI CFGR1[PINCFG] description.

If SIN pin is input then you need to set MSCR[IBE] and respective IMCR[SSS].

BR, Petr

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