Hello NXP Team,
We are developing a custom Firmware Over-The-Air (FOTA) solution for the S32K342 and would like guidance on the recommended flash architecture and boot flow.
MCU Details
Device: S32K342
PFlash: 2 MB
Bank 0: 1 MB
Bank 1: 1 MB
DFlash: 128 KB
Current Status
We are using UART as the firmware update interface.
So far, we have successfully:
Receive the firmware (.bin) over UART
Store the complete binary into flash memory
Verify that the received image is stored correctly
Our remaining challenge is implementing the bootloader architecture and application switching mechanism.
We would like clarification on the following:
1. Recommended FOTA Flash Layout
What is the recommended memory layout for an S32K342 dual-image FOTA implementation?
Specifically, we would like to know the recommended locations for:
Bootloader
Application Slot A
Application Slot B
Metadata / Boot flags
Version information
CRC
Rollback information
An example memory map with addresses would be extremely helpful.
2. Recommended Boot Flow
Could someone explain the complete boot sequence recommended by NXP?
For example:
Reset
Bootloader starts
Check boot flags
Select active application
Validate image (CRC/signature)
Jump to application
We would appreciate a flow diagram or explanation of the complete process.
3. Bootloader to Application Jump
For S32K342, is the standard Cortex-M7 jump sequence sufficient?
For example:
Read MSP from application base address
Read Reset_Handler from base + 4
Set MSP
Update VTOR
Jump to Reset_Handler
Are there any S32K342-specific requirements or initialization steps before transferring control?
4. Dual Application Images
If App A and App B are located at different flash addresses:
Should each application have its own linker script?
Or is there a recommended NXP approach for building dual-slot applications?
5. Flash Bank Usage
Since S32K342 has two 1 MB PFlash banks:
Is the recommended approach to:
Execute the bootloader from Bank 0
Program the new firmware into Bank 1
Switch execution after successful verification
Are there any Read-While-Write or erase/programming restrictions between the two PFlash banks?
6. Metadata Storage
Where is the preferred location to store:
Active image flag
Image validity
Firmware version
CRC
Rollback status
Should these be stored in:
Reserved PFlash
DFlash
Another dedicated region?
7. UART-Based FOTA
Since our update interface is UART, we would like to know the recommended workflow.
Is the following flow correct?
PC
│
UART
│
Bootloader receives .bin
│
Store firmware into inactive flash slot
│
Verify CRC
│
Update boot metadata
│
Reset MCU
│
Bootloader selects new image
│
Jump to application
Or does NXP recommend a different approach?
8. AB_SWAP vs Custom Bootloader
Is HSE AB_SWAP mandatory for production FOTA on S32K342?
Or is a fully custom bootloader with dual application slots also a supported and commonly used architecture?
If there are any application notes, reference projects, bootloader examples, or documentation specifically covering S32K342 FOTA, UART firmware updates, or dual-image bootloaders, we would greatly appreciate the references.
Thank you for your support.
S32K3 S32DS-ARM