Hi @Niuyanlin
Each ADC provides 3 external decode signals (MA) to be used to select 1 channel out of 8 in the external analog multiplexers, and there can be maximum 4 of such multiplexers to connect 32 external channels, it means that these 4 multiplexers sharing the same MA signals.
The ADC automatically sets the MA to control these external analog multiplexers, based on the current channel selected for conversion. Depending on the Mask Register bits, the corresponding “X” pin is sampled, and the result is stored in the matching location for the “MA” & “X” combination.
Since no external analog multiplexers have been designed on our development board, such an example has not been implemented.
Hi NPX Team,
Related with this topic, may you please confirm if is it possible to implement a SCH like the following diagram?
Many thanks for your support.
Hi @Niuyanlin
You can find examples of ADC implementation that may be useful to you in the RTD.
B.R.
VaneB
Hi @Niuyanlin
Each ADC provides 3 external decode signals (MA) to be used to select 1 channel out of 8 in the external analog multiplexers, and there can be maximum 4 of such multiplexers to connect 32 external channels, it means that these 4 multiplexers sharing the same MA signals.
The ADC automatically sets the MA to control these external analog multiplexers, based on the current channel selected for conversion. Depending on the Mask Register bits, the corresponding “X” pin is sampled, and the result is stored in the matching location for the “MA” & “X” combination.
Since no external analog multiplexers have been designed on our development board, such an example has not been implemented.
Thank you very much for your help.