S32K324 FOTA

[RIJILKP]

I am trying to implement FOTA in S32K324 micro. I am new to NXP micro controllers, I would appreciate if someone could help me with below questions.

1. Does the active partition and passive partition start at a predefined address?

2. Is there a possibility to change the start address of Active and passive sections by the user?

3. If this start address of Active & passive sections is not changeable where can I place my bootloader, I only want to update my application as part of FOAT not bootloader.

4. If I place my bootloader to active partition, I should also have the bootloader section defined in passive partition, is this correct?

5. Finally, if someone can share me a linker file sample for FOTA implementation that would greatly help.

6. Question related to TCM: ITCM_0, ITCM_1 and DTCM_0, DTCM_1 has the same starting and ending address, so if I define this in my linker, there will be 2 sections with same starting address, how does the micro controller handle this?

[lukaszadrapa]

Hi @RIJILKP 

1. Yes, the addresses are given and cannot be changed. See “Table 199. AB swap configuration” in S32K3 reference manual.
2. No.
3. Common practice is to have a bootloader at the beginning of the partition and then application follows.
4. In AB swap, you need to have two copies of the bootloader – one in active partition, second in passive partition.
5. I do not have such sample linker file. But it should be quite easy to create own version:
For bootloader, you can define program flash area like (just an example):
int_pflash : ORIGIN = 0x00400000, LENGTH = 0x00010000 /* 64KB for bootloader */
And then in app project:
int_pflash : ORIGIN = 0x00410000, LENGTH = 0x001C4000
6. S32K324 is dual core device. ITCM and DTCM are memories which are connected directly to the cores. Those addresses are visible only for individual core. So, core 0 can see its own ITCM _0 at address 0x0 and core 1 can see its own ITCM_1 also at 0x0. If core 0 needs to access ITCM1, the only option is to use backdoor address. The same is valid for other bus masters.
If you have multicore project for S32K324, there are two sub-projects and each has own linker file.

Regards,
Lukas

[RIJILKP]

1. So, I have to have 2 linker files which specifies which ROM and RAM area is being used for a specific core?

2. Will there a main linker file which includes both of these cores specific linker file?

[lukaszadrapa]

There are two separate linker files. When you create new multicore project for S32K324 in S32 Design Studio, two separate projects will be created and you will find two independent linker files in the projects. See attachment. 

It defines resources for core 0 (suffix _c0) and for core 1 (suffix _c1). Then all the sections are forced to corresponding areas. 

This is an example for multicore project with FULL_MEM HSE firmware. 

More changes will be needed for AB_SWAP mode with bootloader. You can use only active partition (0x40_0000 - 0x5D_3FFF) and it must contain everything: bootloader, project for core 0 and project for core 1. All you need to do - adjust memory sections int_flash_c0, int_flash_c1 in multicore project and int_pflash in bootloader project. 

Regards,

Lukas