S32K322 clock selection

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S32K322 clock selection

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vignesh3
Contributor II

Hi there,

In S32K144 I can select the clock to the peripheral and enable/disable clock by using the PCC_x register.

But when It comes to K3 I need to use MC_ME this Partition register. In this I can not able to select different clock sources only I can enable/disable the peripheral clock.

And which peripheral goes to which Partition that also not clear, could you give me idea about how these peripheral are mapped with different partitions to enable and disable clock to the particular peripheral.

vignesh3_1-1745315414053.png

 

vignesh3_0-1745315213861.png

 

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vignesh3
Contributor II

Hi @petervlna ,

I have checked the RM, but I could not able to fin out these info.

Can you tell me which are the clocks (CORE_CLK/AIPS_SLOW_CLK/AIPS_PLAT_CLK/HSE_CLK) I can use for UART0 in s32k322?

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

You can find it in reference manual. It is Plat_clk

petervlna_0-1745474855538.png

Best regards,

Peter

 

 

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petervlna
NXP TechSupport
NXP TechSupport

Hello,

In this I can not able to select different clock sources only I can enable/disable the peripheral clock.

For S32K3xx clocks are configured in CGM module:

reference manual : Chapter 25 Clock Generation Module (MC_CGM)

And which peripheral goes to which Partition that also not clear

In the clocking chapter you will find which clock is routed where.

petervlna_2-1745390582503.png

 

petervlna_0-1745390439550.pngpetervlna_1-1745390523960.png

 

I recommend you to read carefully clocking chapter where it is described in details.

Best regards,

Peter

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vignesh3
Contributor II
Hi @petervlna ,

I have checked the RM, but I could not able to fin out these info.

Can you tell me which are the clocks (CORE_CLK/AIPS_SLOW_CLK/AIPS_PLAT_CLK/HSE_CLK) I can use for UART0 in s32k322?
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