S32K312 uC reset after 1sec from power on caused by writing MUX_0_DC_2 register (not in Debug)

[atranzillo93]

Hi,

I'm using S32K312 EVB in default jumpeer settings.

In my SystemInit() I have set all clocks:

- configure FXOSC,

- wait stabilization time

- configure PLL

- configure MC_CGM (all dividers of MUX0)

If I use Debug perspective, I run my code without problem.

If I remove Debug e press Reset push button to see my code running, It happens that after 1s RESET_MCU pin is pulled-down.

I have seen that the reason of reset is when I try to write DIV bit of MUX_0_DC_2 register with a value different from 1.

I don't understand why reset happens after 1sec and not immediately since the setting of this register is performed during start-up phase.

Attach you can find my code (problem on 780 row) and image of reset.

Thank you.

[giraffe508]

Hi @atranzillo93 I have gone through your attached image and description, 

It seems that the issue is related to the configuration of the MUX_0_DC_2 register. The reset might be happening after 1 second due to a watchdog timer or some other protection mechanism that is triggered by an incorrect configuration.

I can provide some general guidance on configuring the MC_CGM registers:

1. Make sure you are configuring the registers in the correct order. First, configure the dividers, then the MUXes.

2. Ensure that you are not violating any clock frequency limitations of the S32K312 microcontroller. You can refer to the S32K312 Data Sheet for the maximum and minimum frequency limits.

3. Verify that you have properly configured the PLL and FXOSC before configuring the MC_CGM registers.

If you can provide the code snippet for row 780 and any other relevant code, I would be able to provide more specific guidance on the issue.

Additionally, you can refer to the AN5413: S32K1xx Clocking Options and Guidelines for more information on configuring the clock system for S32K microcontrollers.

I hope this helps. Please let me know if you have any further questions or need more assistance.

Kind Regards, 

[atranzillo93]

Hi, my response in red.

Hi @atranzillo93 I have gone through your attached image and description, 

It seems that the issue is related to the configuration of the MUX_0_DC_2 register. The reset might be happening after 1 second due to a watchdog timer

(in S32K312 EVB watchdog is disabled in startup_cm7.s:

DisableSWT0:
ldr r0, =0x40270010
ldr r1, =0xC520
str r1, [r0]
ldr r1, =0xD928
str r1, [r0]
ldr r0, =0x40270000
ldr r1, =0xFF000040
str r1, [r0]
b __SYSTEM_INIT /* To perform before RAM initialisation since RAM test is done */)

or some other protection mechanism that is triggered by an incorrect configuration.

I can provide some general guidance on configuring the MC_CGM registers:

1. Make sure you are configuring the registers in the correct order. First, configure the dividers, then the MUXes (MUX0 is enabled by default (DE bit is already 1) so I configure before the value of dividers (DIV bit) and then select PLL as clock source for MUX0)

2. Ensure that you are not violating any clock frequency limitations of the S32K312 microcontroller. You can refer to the S32K312 Data Sheet for the maximum and minimum frequency limits. (AIPS_SLOW_CLK is limited to 30MHz but whith my setting I want set it to 20MHz (PLL = 80MHz so I need to set register to 3 to perform division for DIV+1 = 4)

3. Verify that you have properly configured the PLL and FXOSC before configuring the MC_CGM registers. (I have already verify it by reading registers and they are well configured.)

If you can provide the code snippet for row 780 and any other relevant code, I would be able to provide more specific guidance on the issue.

Additionally, you can refer to the AN5413: S32K1xx Clocking Options and Guidelines for more information on configuring the clock system for S32K microcontrollers.

I hope this helps. Please let me know if you have any further questions or need more assistance.

Kind Regards, 

[atranzillo93]

Hi,

I have seen from this issue https://community.nxp.com/t5/S32K/S32K312EVB-reset-problem/m-p/1675867#M24375 that you suggest to use RTD v2.0.3 rather than RTD v3.0.0.

Since it is very expensive for me to reverse engineer you code, I have attached for this reason my source file "STARTD.c" .

Can you check it and say me how to solve the problem caused by writing in MUX_0_DC_2 register a value different from 1?

Thank you.