1.Development environment:S32DS3.5
2.RTD version:4.0.0
3. Refer to the rtd 2.0.3 routine code, detailed code is attached
4. Expected goals such as 4.1 and 4.2
4.1 MOSI only sends data once, while MISO does not receive data
4.2 MOSI triggers the chip selection pin once for every byte of data sent
5. Actual phenomena such as 5.1, 5.2, 5.3, and 5.4
5.1 MOSI keeps sending data, while MISO keeps receiving data
5.2 MOSI triggers the chip selection pin once every 4 bytes of data sent
5.3 Thumbnails
5.4 Unfolding Diagram
6.Main. c is as follows
#include "Mcal.h"
#include "Clock_Ip.h"
#include "Siul2_Port_Ip.h"
#include "Siul2_Dio_Ip.h"
#include "IntCtrl_Ip.h"
#include "Flexio_Mcl_Ip.h"
#include "Flexio_Spi_Ip.h"
/* Time to transfer all frame data */
#define TIMEOUT ((uint32)1000000UL)
static uint8_t data_out[10] = {0x1,0x2,3,4,5,6,7,8,9,10}; /* Transmission buffer. */
static uint8_t data_in[10] = {0,0,0,0,0,0,0,0,0,0}; /* Buffer for receiving. */
#define MASTER_EXTERNAL_DEVICE (Flexio_Spi_Ip_DeviceAttributes_SpiExternalDevice_0_Instance_0)
int main(void)
{
uint32_t Counter = 0xFFFFFF;
/** Clock IPL Init */
Clock_Ip_Init(&Clock_Ip_aClockConfig[0]);
/** siul2 pins init */
Siul2_Port_Ip_Init(NUM_OF_CONFIGURED_PINS_PortContainer_0_BOARD_InitPeripherals,\
g_pin_mux_InitConfigArr_PortContainer_0_BOARD_InitPeripherals);
IntCtrl_Ip_Init(&IntCtrlConfig_0);
Flexio_Mcl_Ip_InitDevice(&Flexio_Ip_xFlexioInit);
Flexio_Spi_Ip_Init(&Flexio_Spi_Ip_PhyUnitConfig_SpiPhyUnit_0_Instance_0);
/* Update Framesize */
Flexio_Spi_Ip_UpdateFrameSize(&MASTER_EXTERNAL_DEVICE, 16U);
/* Update Transfered Bit order */
Flexio_Spi_Ip_UpdateLsb(&MASTER_EXTERNAL_DEVICE, FALSE);
Flexio_Spi_Ip_SyncTransmit(&MASTER_EXTERNAL_DEVICE, data_out, data_in, 10, TIMEOUT);
while (FLEXIO_SPI_IP_IDLE != Flexio_Spi_Ip_GetStatus(MASTER_EXTERNAL_DEVICE.Instance));
}
7.The software related configurations are as follows
7.PIN
7.2flexio_spi
7.3 flexio_mcl_ip
Above,thanks!
