S32K312 SRAM WRITE INCONSISTENT

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S32K312 SRAM WRITE INCONSISTENT

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mcallaway
Contributor II

I have run into a problem where I am getting inconsistent writes to SRAM from Flash. This is if I have defined my own "memcpy" to attempt to write SRAM. If I attempt to use memcpy the MCU will hardfault. I have went through the linker and for all bss (sram) section defined them as 4 byte aligned as well to meet the 32bit alignment requirement. I am lost as what could be causing this. As far as im aware I have no memory protection enabled.

This is using a S32K312 and RTD4 software base.

Example:

RAMVariables_T RAMVariables ;
const RAMVariables_T RAMVariables_DEFAULT = {
  55,                                  /*INIT_RAM_Variables*/
  11UL,                                /* EcuAddr_RAM */
  1536UL,                              /* UDSServerAddr_RAM */
  1616UL,                              /* UDSClientAddr_RAM */
  0U,                                  /* EEPROM_State */
};

void initRAMVariables(RAMVariables_T* ramVariables)
{
  //test_memcpy(ramVariables, &RAMVariables_DEFAULT, sizeof(RAMVariables_DEFAULT));
  uint8_t* dest = (uint8_t *)ramVariables;
  uint8_t* source = (uint8_t *)&RAMVariables_DEFAULT;
  uint8_t len = sizeof(RAMVariables_DEFAULT);
  while (len>0U) {
    *dest = *source;
    dest++;
    source++;
    len--;
  }
}

 Sometimes it will write all of the data but most of the time it will write any random pieces of the data it should which is usually 1/3 of the variables. 

mcallaway_0-1750796530037.png

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @mcallaway,

  1. Are you sure the MPU is not enabled? In S32DS IDE, there is a default configuration in system.c. Because this sounds like a cache issue.
  2. Can you check the stack for overflows?
  3. Is the sizeof() value correct?
  4. Compiler options (like optimization) must be set as per RTD release notes.

 

Regards,

Daniel

 

 

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mcallaway
Contributor II

Daniel,

Thank you for your reply. It did end up being a combination of two things as the issue. Even though I did not have the MPU enabled via the compiler flag, I did have the data cache enabled (-DD_CACHE_ENABLE -DI_CACHE_ENABLE). After removing this the issue seemed to be less present but was still running into random hard faults when accessing or writing from SRAM. I then looked into the RTD platform implementation guide and it recommends using the -Os optimization flag. Well I had optimizations set to -O0 and after changing this everything is running as expected. 

Thank you for your reply.

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