Dears,
When debugging S32K312, when using PWM output function, we found that PWM output card lag would occur when the PWM output period or duty cycle was changed through the software interface, as shown in the following figure1:
Specific parameters are described as follows:
· Chip model: S32K312
·PWM hardware channel PTB18 CH1_15_H
·PWM mode: DAOC
·MCAL clock frequency division 200, bus frequency division DIV_10
Problem description: Because the PWM period required to output is small, this requires that the clock frequency dividing parameter must be set to large. However, we found that when the clock frequency division parameter is set to a large, this card lag problem will occur.
The larger the setting of the frequency division parameter, the longer the delay time after the PWM period or duty cycle is modified, and the same parameters as the current setting will also cause this situation.
Clock frequency division parameters are shown in the figure2 and figure3 below:
Thank you!
Best regards!