S32K3 DMA

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S32K3 DMA

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Zhiwei
Contributor II

@frank_yang_1_offboarding Hi,Frank!

When testing the DMA scatter-gather function , I found the following problems, I hope you can help answer the doubts:

The following buffers are defined in the NoCacheable area. 

①The configuration S/G channel has only one member, and the software triggers the transfer several times, and the transfer can be carried out normally. The TCD is as follows. After the Major Loop is completed, the source address can be shifted forward by 16Bytes normally.

Zhiwei_1-1648626063757.png

Zhiwei_2-1648626080381.png

②Add a member on the basis of ①, and the software triggers the transport for many times. Member 2 can be transported normally, and member 1 is only transported normally for the first time. The TCD is as follows. After the Major Loop is completed, through the register TCD0_SADDR, it can be seen that member 2 is normal. Offset the source address forward by 16Bytes, but it is not possible to judge whether member 1 is normally offset by looking at the register. 

Zhiwei_3-1648626101909.png

③In addition, it is found that Dma_Ip_Init-> Dma_Ip_LogicChannelInit-> Static_Dma_Ip_SetLogicChannelScatterGatherInit-> HwAccDmaCh_LoadConfigIntoSoftwareTcd will not assign Destination.LastAddrAdj to the register; therefore, after the Major loop is completed, the target address cannot be offset, even if the graphical interface has been configured offset; to achieve address offset Move, you need to manually define it yourself, is this a bug?

Zhiwei_4-1648626109389.png

The attachment is my routine, if you have time, please help to see if there is any misoperation, thank you very much!

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