S32K3_ADC_Calibration fail

[wuxianlong]

Hi, NXP

I have configured ADC0 and ADC1, and then I found that ADC0 occasionally fails in the verification. What is the reason for this verification failure? As I understand it, if the verification fails, it will directly output a failure. At present, I see that it stays at CALBISTREG[C_T_BUSY].After my application has run for a long time, I check the register and find that this status remains unchanged.Why is that?

企业微信截图_17746949648793.png

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Best Regards,
xianlong

[wuxianlong · Accepted solution]

Hi，@db16122 @Senlent 

Thank you for your help.

At present, the root cause has not been found through testing. When I directly disconnect the VREFH pin and then call the calibration function Adc_Calibrate, the calibration will fail. However, this calibration failure will set the TEST_FAIL register and the ADC status will change to IDLE. It will not get stuck in the Calibrate state.
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Although the cause of the problem is unknown, the measures in the check list should be able to avoid this problem.

Best Regards,
xianlong

[db16122]

what kind of signal you want to use ADC to transfer? motor control or some secific signal

[wuxianlong]

Hi,@db16122 

Thank you for your attention. It's just about collecting some voltage signals, which has nothing to do with motor control. Do you have any relevant experience to share?

Best Regards，
xianlong

[db16122]

according to the TSAMP setting, the value is 00b which 22 cycles. Maybe you can change to 11b which is 32cycles as the ADC calibration may take some time. Please review the S32K3 checklist 20260104.

btw, does the ADC calibration fail all the time or fail occasionally？Is any possibility for ADC calibration reference voltage change by noise from somewhere?

[Senlent]

Hi@wuxianlong

In your picture, the MCR is 0xA100 0E03 ,so that the bit "PWDN" is 1

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However, the  "PWDM" should be set to 0b before next steps.

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I'm not sure if this is the reason why the ADC verification failed, keeping it in the BUSY state.

[wuxianlong]

Hi,@Senlent 

I investigated the underlying code, and this status can be explained. When the ADC fails to calibrate for some reason, the hardware state machine of the ADC module remains in Calibrate. After the software completes the calibration process, it will disable the ADC module, reconfigure the clock, and then enable the module again. The criterion for the software to return is the ADC status register, but currently, the value of the register is Calibrate. The software returns a timeout and then will not power up this ADC module again.

The main problem now is why the hardware state machine of the ADC module remains in Calibrate?And this problem is occasional, and as long as you change a little code, the problem will be very difficult to reproduce.
企业微信截图_1774870123825.png
Best Regards,
xianlong

[Senlent]

Hi@wuxianlong

I don't have many ideas on this either. I suggest you read the following sections of this document:

章节：3.6.9 ADC校准建议

https://community.nxp.com/t5/S32K/S32K3%E5%B8%B8%E8%A7%81%E9%97%AE%E9%A2%98%E6%A3%80%E6%9F%A5%E5%88%...

Some suggestions regarding ADC self-checking.

Please check each suggestion above to see if there are any areas for optimization.