S32K144 SPLL_CLK and FIRC_CLK usage issues

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S32K144 SPLL_CLK and FIRC_CLK usage issues

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547416104
Contributor III

Hello EveryOne,

The development platform is to send multiple bytes through the UART module (500Kb/s) of the S32K144, and then send them out through the CAN transceiver(1042), and the receiver is also connected to the CAN transceiver through the UART to receive the data sent by the MCU.

Configuration method 1:Using the FIRC_CLK as the system clock, the receiver can receive all the data sent by the MCU, and the communication is normal.

Configuration method 2: Use the SPLL_CLK as the system clock, there is a problem of frame loss during communication, and the receiver cannot receive all the data.

Remark:

The FIRC_CLK clock frequency setting is same with the SPLL_CLK (48MHZ).

 

Question:

What is the difference between SPLL_CLK and FIRC_CLK?

 

547416104_0-1665924914330.png

547416104_1-1665925118239.png

 

 

 

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1,470 次查看
547416104
Contributor III

1.The issue is fixed, the OSC is not OK, changed the OSC is OK

 

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1,477 次查看
Senlent
NXP TechSupport
NXP TechSupport

Hi@547416104

1.the resulting SPLL_CLK frequency must be between 90 and 160 Mhz

Senlent_0-1665973115278.png

2.Why use UART module instead of  CAN module?

 

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1,471 次查看
547416104
Contributor III

1.The issue is fixed, the OSC is not OK, changed the OSC is OK

 

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