S32K144 FlexCAN0 FD Mode

[Prashanth1]

Hi NXP Community,

I'm currently working on enabling CAN FD (no BRS) reception using FlexCAN0 on S32K144. I have successfully configured Classic CAN for both standard and extended IDs, and it works as expected.

However, when switching to CAN FD with BRS = 0, I am unable to receive messages for extended IDs 0x7E0 and 0x7DF. Here's a summary of what I’ve done:

---

Configuration Details:

• FD Mode Enabled (CTRL2.ISOCANFDEN = 1)

• BRS Disabled via frame format, but FDCTRL.FDRATE = 1 (still OK per spec)

• Message Buffers 4 and 5 configured to receive extended IDs 0x7E0 and 0x7DF

• Bit Timing (Nominal = 500 kbps, Data = 2 Mbps)

• CBT & FDCBT used for CAN FD mode (via FD features)

---

What Works:

• Classic CAN Rx/Tx works for both IDs.

---

Issue:

When trying to receive CAN FD frames with BRS = 0, no interrupt or flag is triggered, and nothing is received in MB4/MB5.

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Code :

void FLEXCAN0_init(void)
{
#define MSG_BUF_SIZE 18 /* Msg Buffer Size: 2 header + 2 data = 4 words */
uint32_t i = 0;

/* Enable clock to FlexCAN0 */
PCC->PCCn[PCC_FlexCAN0_INDEX] |= PCC_PCCn_CGC_MASK;

/* Enable FD support and allow configuration via CBT */
CAN0->MCR |= CAN_MCR_MDIS_MASK; // Disable module
CAN0->CTRL1 &= ~CAN_CTRL1_CLKSRC_MASK; // CLKsrc=0: Clock Source = SOSCDIV2 (8 MHz)
CAN0->MCR &= ~CAN_MCR_MDIS_MASK; // Enable module (enter Freeze mode)

while (!((CAN0->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT)) {}

/* Configure nominal phase: 500 kbps */
CAN0->CBT = CAN_CBT_EPSEG2(12) // EPSEG2 = 12
| CAN_CBT_EPSEG1(18) // EPSEG1 = 18
| CAN_CBT_EPROPSEG(46) // EPROPSEG = 46
| CAN_CBT_ERJW(12); // ERJW = 12

/* Configure data phase: 2 Mbps */
CAN0->FDCBT = CAN_CBT_EPSEG2(3) // FPSEG2 = 3
| CAN_CBT_EPSEG1(7) // FPSEG1 = 7
| CAN_CBT_EPROPSEG(7) // FPROPSEG = 7
| CAN_CBT_ERJW(3); // FRJW = 3

/* Enable FD mode with TDC, 64-byte payload, BRS = 1 */
CAN0->FDCTRL = CAN_FDCTRL_FDRATE_MASK // BRS enabled
| CAN_FDCTRL_MBDSR0(3) // MB payload = 64 bytes
| CAN_FDCTRL_TDCEN_MASK // Transceiver delay compensation
| CAN_FDCTRL_TDCOFF(5); // TDC offset = 5

/* Clear all message buffers */
for (i = 0; i < 128; i++) {
CAN0->RAMn[i] = 0;
}

/* Enable all RXIMR filters */
for (i = 0; i < 16; i++) {
CAN0->RXIMR[i] = 0xFFFFFFFF;
}

CAN0->RXMGMASK = 0x1FFFFFFF;

/* MB4 -> Receive Extended ID 0x7E0 as CAN FD, no BRS */
CAN0->RAMn[4 * MSG_BUF_SIZE + 0] =
(4 << 24) // CODE = 0b0100 (Rx Empty)
| (1 << 21) // IDE = 1 (Extended ID)
| (1 << 20); // EDL = 1 (CAN FD Frame, BRS = 0)

CAN0->RAMn[4 * MSG_BUF_SIZE + 1] = 0x1F800000; // ID = 0x7E0

/* MB5 -> Receive Extended ID 0x7DF as CAN FD, no BRS */
CAN0->RAMn[5 * MSG_BUF_SIZE + 0] =
(4 << 24) // CODE = 0b0100 (Rx Empty)
| (1 << 21) // IDE = 1 (Extended ID)
| (1 << 20); // EDL = 1 (CAN FD Frame, BRS = 0)

CAN0->RAMn[5 * MSG_BUF_SIZE + 1] = 0x1FA00000; // ID = 0x7DF

/* Enable ISO CAN FD CRC support */
CAN0->CTRL2 |= CAN_CTRL2_ISOCANFDEN_MASK;

/* Exit freeze mode */
CAN0->MCR = 0x0000081F;

while ((CAN0->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT) {}
while ((CAN0->MCR & CAN_MCR_NOTRDY_MASK) >> CAN_MCR_NOTRDY_SHIFT) {}
}

---

My Questions:

1. Is additional configuration required to receive CAN FD frames with BRS = 0?

2. Are there restrictions in FlexCAN that affect reception of FD frames without bit rate switching?

3. Does FDCTRL.FDRATE need to be set to 0 when BRS is not used?

4. How can I debug whether the message is being filtered or discarded?

---

Tools Used:

• S32 Design Studio

• S32K144EVB

• External CAN tool sending FD frames with BRS = 0

---

Thanks in advance for your help!

Best regards,
Prashanth Kumar M G

[PetrS]

Hi,

1) no, it behaves the same way as receiving Normal CAN, Also you need not to set BRS/EDL bits in RX MB. Those are updated upon reception based on message
2) no restriction for receiving
3) FDCTRL.FDRATE affects only message transmission, does not influence reception. 
4) you can only see if message is properly received without error, in that case MB flag is set and MB updated. There is no indication of discard etc. You can inspect error detected (ECR/ESR1 registers)

In your case, most probably the MB ID setting is the cause. if have IDE bit set and 
CAN0->RAMn[4 * MSG_BUF_SIZE + 1] = 0x1F800000; // ID = 0x7E0
Then did you send message with ID=0x1F800000 by CAN tool? Or you sent ext ID = 0x7E0
In that case you need to have
CAN0->RAMn[4 * MSG_BUF_SIZE + 1] = 0x7E0; // ID = 0x7E0

BR, Petr

[Prashanth1]

Hi @PetrS,

Thank you for your response!

As you suggested, I tried configuring the CAN to receive only 0x7E0 Extended ID frames, but I’m getting a Bus Error when trying to receive FD frames with those settings. (I'm using PEAK CAN for sending CAN FD frames with EXT ID - 0x7E0 with BRS = 0)

I would like to request your help with a more specific configuration. I'm trying to configure FlexCAN0 on the S32K144 to receive CAN FD frames with the following settings:

• Nominal Bitrate: 1 Mbps

• Data Bitrate: (Same as nominal, since BRS = 0)

• FD Mode: Enabled

• Bit Rate Switching (BRS): Disabled (i.e., BRS = 0)

• Frame ID to receive: Extended ID 0x7E0

So far, I’ve been successful with Classical CAN using various IDs and baud rates, but I'm having trouble with enabling and validating the FD mode specifically on S32K144.

Could you please provide a step-by-step guide or checklist to:

1. Enable and configure CAN FD mode on S32K144 (FlexCAN0).

2. Properly configure the timing and control registers for 1 Mbps nominal bitrate with FD enabled and BRS disabled(FlexCAN0_clk -> 40MHz).

3. Set up the receive message buffers to accept Extended ID 0x7E0 in FD format.

4. Verify that the received FD frame is being correctly handled (with or without payload checking).

Thanks in advance for your support!

Best regards,
Prashanth Kumar M G

[PetrS]

Hi,

can you share your simplified project so I can check/test?

BR, Petr

[Prashanth1]

Hi Sir,
I attached my project .zip file privately
Can you please Check Once

[PetrS · Accepted solution]

Hi,

thanks for a code, unfortunately I do not have SDK401 installed, so cannot compile a code.
But from code checking I also see the CAN bit timing is wrong. You need to set module to use sys_clk as clock source as with 8MHz crystal you cannot get desired 1M/2M bitrate.
See attached demo, tested on S32K144EVB.
I got right communication with PCAN tool, receiving ext ID0x7e0 FD message with BRS=0 into MB4.

Hope it helps.

BR, Petr

[Prashanth1]

Hi Sir,
Thank you very much! Your latest suggestion worked perfectly, and now I'm able to receive CAN FD frames with the desired configuration on the S32K144.

I have a quick follow-up:

Is there any **easiest or recommended way to calculate the CAN/CAN FD bitrates**, especially while choosing the timing segments and prescaler values?
So far, I'm using this formula:

```
Bitrate = CAN_CLK / ((1 + PROPSEG + PSEG1 + PSEG2) * (1 + PREDIV))
```

Is this only formula we should rely on? Also, in the S32K SDK, I noticed that the available FlexCAN configuration APIs (like `FLEXCAN_SetBitrate()`, etc.) **don’t seem to produce valid timing settings**, especially for FD mode. Is there any specific reason behind this or a better way to use those APIs correctly?

Thanks again for your support and guidance!

Best regards,
Prashanth Kumar M G

[PetrS]

Hi,

the generic formula is 
Bitrate = CAN_CLK / ((1 + PROPSEG + PSEG1 + PSEG2) * (PREDIV))
where parameters are calculated one, note the value written to register is minus 1, except of propseg for data phase. To ease calculation you can use below tool I did
https://community.nxp.com/t5/MPC5xxx-Knowledge-Base/MPC5xxx-S32Kxx-LPCxxxx-CAN-CAN-FD-bit-timing-cal...

For FlexCAN SDK API; FLEXCAN_DRV_SetBitrate and FLEXCAN_DRV_SetBitrateCbt can be used to set nominal and data bitrates. Functions writes given values to respective registers directly.

BR, Petr