#S32K144 Cache write Test

[joshua9264]

##S32K144 support modifying cache values? Why is it that after I modify a value, reading the same address still returns the original value? Additionally, can the cache's parity bit be tested？thanks

[danielmartynek]

Hi @joshua9264,

Have a look at this example:
https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K142-LMEM-Cache-v1-0-S32DS3-6-RTD300/ta-...

Regards,

Daniel

[joshua9264]

OK，thank you，i will have a test

[danielmartynek]

Hi @joshua9264,

It is technically possible to change the cache value through the LMEN registers.

Let me create a simple test project.

BR, Daniel