S32K DMA

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S32K DMA

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hajianik
Senior Contributor I

Hi,

According to the reference manual (S32K144) the clock source for the DMA module is System Clock which is not gated via PCC, and yet if I comment the following line out,  the code doesn't work.

PCC->PCCn[PCC_DMA0_INDEX] |= PCC_PCCn_CGC_MASK; // CGC=1: Clock enabled for DMA0

So what is going on here?

even in the design studio debugger's  PERIPHERAL REGISTER view, PCC_DMA doesn't exist. This is a bit confusing .

In one of the S32K144.H variant PCC_DMA0_INDEX is defined as 8. 

BUT AS I MENTIONED BEFORE  there is no reference to this  in the user manual or anywhere. I may be missing something.

Can someone clarify please.

Thanks,

Koorosh Hajiani

248-778-6396

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

There are differences between S32K144 v1.0 (N77P), v2.0(N47T), v2.1(N57U).

The PCC_DMA0 register should be removed from v2.0 and v2.1.

Apparently you use v1.0 (N77P) where the register must be set.

Please check what version you use.  

 

Regards,

Daniel