S32K ADC

[hajianik]

Hi,

Here is the situation:

I've 5 ADC input, 2 are on ADC0 and 3 are on ADC1.

I used PDB0 and PDB1 to convert those 5 channels successfully however now the customer requirement is that 1 input on ADC1 needs to be sampled every 1 ms.  previously all the 5 channels were sampled at 20 ms .

So since only SC1_A could be triggered and the rest would follow in a back2back fashion, is this even possible?

if I trigger on the desired input every 1ms and still needs to sample the other 2 in 20ms how is this possible?

Thanks,

Koorosh Hajiani

[PetrS]

Hi Koorosh,

I do not think you can achieve such behavior simply. ADC can not operate in SW and HW triggered mode at a time.

I can see 3 ways to do conversions:

- rearrange measured signals on your design to have "20ms" channels on one ADC and "1ms" channel on second

- keep the connection and measure all 3 channels on ADC1 at 1ms rate. Use ADC result when needed.

- modify the PDB control register to enable additional 2 pretriggers after each 20 conversions of "1ms" channel, then again disable those pretriggers after conversion is done.

BR, Petr 

[hajianik]

Petr,

Thanks for your response,

Actually it is too late for rearranging the inputs, PCBs are already done.

I've opted for triggering all channels in 1 ms.and as you mentioned read the one in 1 ms and others 20 ms intervals

as far as the other solution : I'm planning to configure that 1 ms input as single continuous scan and every 20ms to do the reset using PDB,

WHAT IS THE CONVERSION TIME AT 8 MHZ ADC CLK AND 48MHZ BUS CLOCK and 12 SAMPLES ?

I don't think I can do continuous scan on multiple channel, can I?

How about using DMA on ADC? It wouldn't make it faster but It will be less CPU loading.

So my biggest question is :

Can I do continuous scan on multiple channel?

finally you mentioned :

modify the PDB control register to enable additional 2 pretriggers after each 20 conversions of "1ms" channel, then again disable those pretriggers after conversion is done.

How do I DISABLE THE PRETRIGGERS?

Thanks,

[PetrS]

Hi,

the ADC conversion time formula is given in the RM in chapter 42.5.4.5 and it is 

ADC TOTAL CONVERSION TIME = Sample Phase Time (set by SMPLTS + 1) + Hold Phase (1 ADC Cycle) + Compare Phase Time (8-bit Mode = 20 ADC Cycles, 10-bit Mode = 24 ADC Cycles, 12-bit Mode = 28 ADC Cycles) + Single or First continuous time adder (5 ADC cycles + 5 bus clock cycles)

You can convert multiple channels using PDB either by setting proper delay for each pretriggers or using back-to-back mode. In back to back mode the first pretrigegr in chain must be triggered by PDB channel, not by ADC COCO. Thus using right setting and timing you can mimic continuous scan of multiple channels.

Yes, the ADC can trigger a DMA request on conversion completion. There is an example code Example S32K144 PDB ADC trigger DMA ISR S32DS, which can help.  

Pretriggers are enabled/disabled using PDB.CHnC1[EN] bits.

BR, Petr