S32DS SPI CS_VIA_GPIO

[Djuric]

Hello,

I can see in the  Sbc_Fs26_HLD example that there is an option in the Spi component (MCAL) to set a CS pin, which allows manual control over the CS pin

Djuric_0-1763133632091.png
But I'm not clear where that option is if I don't want to use a MCAL layer.
So, not working according to a AUTOSAR framework.

In the same type of example but in the version Sbc_fs26_example_IP , which is not according to AUTOSAR standard, I don't have that option.
Where is SPI CS as GPIO pin control, option in the non autosar example?

Djuric_1-1763134045440.png

Thank you.

[VaneB]

Hi @Djuric 

Unlike the SPI driver (MCAL), the LPSPI driver (IP) does not provide an explicit option to indicate whether the CS will be managed via GPIO or by the HW engine. For the IP driver, handling CS through GPIO must be implemented in code, and in ConfigTool you need to configure the desired pin as a GPIO.

Additionally, please note that a low CLK pulse occurs when using the first workaround for ERR050456, which involves resetting the LPSPI module. If you select the second workaround, this low pulse will not appear.

For more details about how to enable the second workaround, refer to Section 3.6.8 of the User Manual for S32K3_S32M27x SPI Driver.

BR, VaneB

[Djuric]

Thanks for the answer.
How do I configure the CS pin in the S32DS tool to be a GPIO, when it is reserved for a Lpspi peripheral. There is a definition collision. One pin cannot be defined in two different components Lpspi and SIUL. Can you send me a screenshot of where this is exactly set up. I read the documentation, this chapter refers to settings in the AUTOSAR context.

[VaneB]

Hi @Djuric 

The pin should be configured only as a GPIO, not as an SPI pin. For example, instead of defining it like this in the Pins Tool:

VaneB_0-1763152493107.png

It should be configured as follows:

VaneB_1-1763152562933.png

Then, control the state of the pin using the API Siul2_Dio_Ip_WritePin(). 

[Djuric]

Hi @VaneB ,
I followed your advice and these are the steps I took:

1) I unrouted a lpspi1_pcs0 pin from the LPSPI1 peripheral

Djuric_1-1763510420151.png

2) I routed the same pin and declared it as GPIO.

Djuric_2-1763510470230.png

3) Before initiating SPI communication with Lpspi_Ip_SyncTransmit, I would first lower the pin (which simulates the CSB) with Siul2_Dio_Ip_WritePin and then raise it high again after Lpspi_Ip_SyncTransmit.
It is Full Duplex communication, SpiPinConfiguration mode 3.

4) SPI communication is not successful. Do I need to set something here (or somewhere else)?

Djuric_3-1763510648527.png

Could you provide further instructions?
Thank you.

[VaneB · Accepted solution]

Hi @Djuric 

I have tested a basic LPSPI example in polling mode, using a hardware loopback by connecting the master output to the master input. This setup was used to verify that both transmission and reception are functioning correctly.

To help ensure that no configurations, initializations, or code elements are missing from your setup, I am attaching the .mex file and the main source file for your reference.

Note: The code was developed using S32DS v3.6.2 with RTD 6.0.0 and tested on an S32K3X4EVB-T172.

[Djuric]

Thank you.