Hi Kerry,
Thank you so much for your help.
Still I am facing same issue.
I am using S32K144 microcontroller and FlexCAN master example given in SDK.
I modified
/*FUNCTION**********************************************************************
*
* Function Name : FLEXCAN_HAL_Init
* Description : Initialize FlexCAN module.
* This function will reset FlexCAN module, enable self wakeup mechanism, select
* wakeup source filter, enable wakeup interrupt set maximum number of message
* enable bussoff, error and warrning interrupt buffers, initialize all message
* buffers as inactive, enable RX FIFO if needed, mask all mask bits, and
* disable all MB interrupts.
*
*END**************************************************************************/
flexcan_status_t FLEXCAN_HAL_Init(CAN_Type * base)
{
/* Reset the FLEXCAN*/
BITBAND_ACCESS32(&(base->MCR), CAN_MCR_SOFTRST_SHIFT) = (0x1);
/* Wait for reset cycle to complete*/
while (BITBAND_ACCESS32(&(base->MCR), CAN_MCR_SOFTRST_SHIFT)){}
/* Disable the CAN clock */
FLEXCAN_HAL_Disable(base);
FLEXCAN_HAL_EnableWakeUp(base);
/* Enable the CAN clock */
FLEXCAN_HAL_Enable(base);
/* Set Freeze, Halt*/
FLEXCAN_HAL_EnterFreezeMode(base);
/* Select Wakeup Source filter for RX input */
BITBAND_ACCESS32(&(base->MCR), CAN_MCR_WAKSRC_SHIFT) = (0x1);
/* Enable Wakeup Interrupt Source */
BITBAND_ACCESS32(&(base->MCR), CAN_MCR_WAKMSK_SHIFT) = (0x1);
/* Set the WRNEN bit in CAN_MCR register */
BITBAND_ACCESS32(&(base->MCR), CAN_MCR_WRNEN_SHIFT) = (0x1);
/* Set the BOFFMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_BOFFMSK_SHIFT) = (0x1);
/* Set the ERRMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_ERRMSK_SHIFT) = (0x1);
/* Set the TWRNMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_TWRNMSK_SHIFT) = (0x1);
/* Set the RWRNMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_RWRNMSK_SHIFT) = (0x1);
/* Clear the BOFFREC bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL1), CAN_CTRL1_BOFFREC_SHIFT) = (0x0);
/* Set the BOFFDONEMSK bit in CAN_CTRL1 register */
BITBAND_ACCESS32(&(base->CTRL2), CAN_CTRL2_BOFFDONEMSK_SHIFT) = (0x1);
/* Rx global mask*/
(base->RXMGMASK) = (((uint32_t)(((uint32_t)(CAN_RXMGMASK_MG_MASK)) << CAN_ID_EXT_SHIFT)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK));
/* Rx reg 14 mask*/
(base->RX14MASK) = (((uint32_t)(((uint32_t)(CAN_RX14MASK_RX14M_MASK)) << CAN_ID_EXT_SHIFT)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK));
/* Rx reg 15 mask*/
(base->RX15MASK) = (((uint32_t)(((uint32_t)(CAN_RX15MASK_RX15M_MASK)) << CAN_ID_EXT_SHIFT)) & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK));
/* De-assert Freeze Mode*/
FLEXCAN_HAL_ExitFreezeMode(base);
/* Disable all MB interrupts*/
(base->IMASK1) = 0x0;
return FLEXCAN_STATUS_SUCCESS;
}
this function and after set bit rate FLEXCAN_DRV_SetBitrate(FSL_CANCOM1, &myBitRate);
I am calling POWER_SYS_SetMode(0,POWER_MANAGER_POLICY_AGREEMENT);
as a stop mode.
Am I doing correct, Because of as per your earlier reply " Kan li already share the flexcan validation code for your reference." it seems same.
Please suggest if I am doing rong anything.
Regards,
Arvind.