Need Clarification regarding S32K322 reference manual register description for DCM_GPR

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Need Clarification regarding S32K322 reference manual register description for DCM_GPR

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Mohana1
Contributor I

The register field descriptions for the GNG error bits (VDD2P5_GNG_ERR and VDD1P1_GNG_ERR) and their respective enabling/control bits appear to be contradictory in the reference manual — specifically, the bit encoding description (0b/1b) for the Go/No-go indication is inconsistent between the field description and the enabling bit description for the same register.

Mohana1_0-1781081979144.pngMohana1_1-1781082023697.png

 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @Mohana1,

Thank you for pointing this out; it has been reported.
I will update the thread as soon as new information becomes available.

 

BR, Daniel

 

 

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