LPUART issue on S32k148

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LPUART issue on S32k148

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Kazarian
Contributor III

Hello, 

im using S32k148 and trying to use the LPUART driver from the sdk.

when i initialise the driver : LPUART_DRV_Init(INST_LPUART1, &lpuart1_State, &lpuart1_InitConfig0); the program stuck and does not return, i found the issue in LPUART_Init(), i dont know why it says bus error ?

 

Kazarian_0-1652111389950.png

Regards.

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Robin_Shen
NXP TechSupport
NXP TechSupport

Refer to the "53.4.2 Baud rate generation" of S32K1xx MCU Family - Reference Manual

53.4.2 Baud rate generation.png

I can see you select CLK_SRC_SIRC_DIV2 for LPUART ASYNCH Module Clock. The baud rate has nothing to do with your choice of external external 40Mhz clock source. Please send 0x55 or 0xAA and measure the actual baud rate of the TX pin with a logic analyzer or oscilloscope.

Best Regards,
Robin
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Kazarian
Contributor III

Hello Robin, 

Thank you for your answer.

the clock gate is enabled in the clockMan1.c file by default

Kazarian_0-1652201195364.png

but i needed to change the OSC clock from 8 MHz to 40Mhz since im using an external 40Mhz clock source.

this seems to solve the issue to a certain extent, when i want to receive data in Putty at a baudrate of 115200 i get random char, which means my clock is not correctly configured.

Kazarian_1-1652204445527.png

 

here is a summury of my clock configuration :

Kazarian_2-1652204536712.png

 

Kazarian_3-1652204563382.png

LPUAR config

Kazarian_4-1652204628070.png

 

Thank you for your support

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Robin_Shen
NXP TechSupport
NXP TechSupport

Refer to the "53.4.2 Baud rate generation" of S32K1xx MCU Family - Reference Manual

53.4.2 Baud rate generation.png

I can see you select CLK_SRC_SIRC_DIV2 for LPUART ASYNCH Module Clock. The baud rate has nothing to do with your choice of external external 40Mhz clock source. Please send 0x55 or 0xAA and measure the actual baud rate of the TX pin with a logic analyzer or oscilloscope.

Best Regards,
Robin
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- We are following threads for 7 weeks after the last post, later replies are ignored
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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi Kazarian,

Please check if the clock gate and the selected clock source are enabled: Table 27-9. Peripheral module clocking

Table 27-9. Peripheral module clocking LPUART.png

Best Regards,
Robin
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