LPUART Baudrate issue

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LPUART Baudrate issue

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Contributor II

Hi,

 

I am working on S32K144 LPUART. I want to test UART with 115200 baud rate for BLE connectivity. When configure baudrate as 115200kbps actual baud rate is 115384kbps.

When communicating only to BLE, communication is successful, once few task are added communication fails.

How to configure to 115200 exactly?

Thanks & Regards,

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Contributor II

Thanks Robin. I measured and changed the baud rate. It is now working consistently. My problem has been solved by changing the LPUART0 clock to SIRCDIV2_CLK and by changing the Baud rate. Appreciate your help in getting it to work.

Best regards

Sandhya

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Contributor II

Thank you. After changing the clock for LPUART0 to SIRCDIV2_CLK, the BLE app is now connecting, but not consistently every time. It is successful 3 out of 5 times. What could be the reason? I am using LPUART1 with FIRCDIV2_CLK for USART interface, which is working fine. WIll this be affecting the behaviour of the BLE?

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NXP TechSupport
NXP TechSupport

Please check the real baudrate of BLE.(Measure the bit width of signal sent out from BLE by using oscilloscope.)
You can adjust the baud rate of LPUART as close as possible to the baud rate of BLE.
You don't have to configure the baud rate of LPUART to 115200, just need to make the UART baud rate meet the tolerance require of BLE.

Best Regards,
Robin

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Contributor II

Thanks Robin. I measured and changed the baud rate. It is now working consistently. My problem has been solved by changing the LPUART0 clock to SIRCDIV2_CLK and by changing the Baud rate. Appreciate your help in getting it to work.

Best regards

Sandhya

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Contributor II

Hi,

I am using FIRCDIV2_CLK for LPUART. Is that correct?

I have not measured the baud rate.

Thanks and Regards

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NXP TechSupport
NXP TechSupport

Hi sandhyaravikuma,

Would you please let me know the frequency of your BUS_CLK?
According to the "Table 27-8. Peripheral clock summary": Maximum frequency governed by BUS_CLK.

Table 27-8. Peripheral clock summary.png

If the frequency of BUS_CLK is less than FIRC_DIV2(48MHz), then you can not use FIRC_DIV2 as the Peripheral functional clock of LPUART.

Best Regards,
Robin

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Contributor II

My BUS_CLK is 12MHz and FIRCDIV2_CLK is 24MHz. But changing the BUS_CLK to 24MHz gives a warning in Component Inspector. How can I make the change for BUS_CLK?

sandhyaravikuma_0-1599901713031.png

 

 

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NXP TechSupport
NXP TechSupport

If you cannot modify the BUS frequency, you can consider change a lower frequency Peripheral functional clock.

LPUARTx_CLK.png

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NXP TechSupport
NXP TechSupport

Hi sandhyaravikuma,

Have you try to measure the baud rate when communication fails?
Would you please tell me clock source of LPUART? The accuracy of the clock source will also affect the baud rate.

clock source.png

Best Regards,
Robin

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