LPSPI Rx FIFO in Continuous Mode

[sankar_devaraj]

The LPSPI is configured as Continuous mode (CONT=1 and CONTC=1), Master Mode .

After loading first transmit data into TX FIFO, The RX FIFO is not filled immediately . only In the next data Transmission the RX FIFO is getting filled.
Why this delay is present, Is it Controller feature?.

[ZohaibAli]

@sankar_devaraj I am having exactly the same issue with LPSPI on IMX RT1060, but I am not satisfied with @danielmartynek's reply because I am checking Receive Data Register after writing the first byte on Transmit Data Register, so Tx FIFO should not be empty. Please let me know what was the solution for you?

Thanks,

Zohaib Ali

[sankar_devaraj]

Hi , Daniel Martynek Thanks for the Reply , Yes i am asking about the RX delay in continuous mode.

[danielmartynek]

Hi,

I unable to reproduce this behavior on S32K144.

The transmission starts immediately in the continuous mode.

Can you share your test code?

Regards,

Daniel

[danielmartynek · Accepted solution]

Hi,
I’ve just noticed that you mean that Rx FIFO is not loaded immediately.
Yes, this behavior is expected.
Section 49.4.2.2, S32K1xx RM rev. 7
“During a continuous transfer, if the transmit FIFO is empty, then the receive data is only written to the receive FIFO after the transmit FIFO is written or after the Transmit Command Register (TCR) is written to end the frame.”

Regards,
Daniel