LIN Communication with Flexio_Lin

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LIN Communication with Flexio_Lin

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ASN7
Contributor III

I have custom board of S32K314_172HDQFP with TJA1029 LIN Transceiver. The TX and RX are assigned to PTA8 and PTA9 which correspond to FXIO_D6 and FXIO_D7 respectively.

ASN7_2-1731495546903.png

 

Now I add the Flexio_Mcl_Ip and then under Specific Configuration Tab, I select Logic Channel 0 for Tx and select Flexio Pin as PIN_6 and respectively Flexio Logic Channel 1 for Pin_7. Under Flexio_Lin Driver and under the Lin Global Config Tab, I select Lin hardware FLEXIO_IP_0, and then Rx and Tx Channel as shown in the image below.

ASN7_1-1731495505011.png

 

ASN7_0-1731495492754.png

 

Irrespective of the TJA1029, I should be able to see the output from the MCU on my logic analyser right, but I just see one pulse. Is there something that I am missing ?

ASN7_3-1731495788070.png

Since I cannot share my complete code, I have attached the part of code related to LIN which I have taken from the example code "Lin_Ip_FrameTransfer_S32K344".

 

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ASN7
Contributor III

Can you clarify how to select the Pin & Channel of FlexIO for LIN ? 

ASN7_0-1745399998352.png


For example I select PTE0 as LIN_RX which is FXIO_D3 and PTE1 as LIN_TX which is FXIO_D2, what are the channel and respective pin numbers for S32K314 ? 

I get the issue because I see multiple FXIO_Dx for each FXIO pins. 

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ASN7
Contributor III

I do not know why the code was not attached. But I have attached it here. 

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

it looks like driver interrupt is not installed and called so next frame bytes are not processed. Try to check that. Also discussed on https://community.nxp.com/t5/S32K/S32K324-Lpuart-lin-Master-Continually-Returning-Status-quot/m-p/18...

Also LIN transceiver must be connected and active. IF testing without transceiver you need to connect TX to RX.

BR, Petr

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