ICU issue with PLL-PHI0 as source clock

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ICU issue with PLL-PHI0 as source clock

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zp001
Contributor III

Hello,

I use a PWM channel to generate waveform as input source of ICU, and fix 10Hz for this channel.

Another channel is used for ICU function.

Here is my testing data:

zp001_0-1671324161939.png

 

we can find that if use FIRC as eMIOS source clock, the results are right.

If use PLL-PHI0, the results are wrong, moreover, the active time value is bigger than period, that's unreasonable.

I also find the official RTD eMIOS_ICU example use FIRC as eMIOS source clock,but if we create a new application project, the eMIOS instances use PLL as source clock in the clock map.

I'd like to know why ICU can't use PLL as source clock and how to fix that?

For above tesing data, if I'm wrong please correct it!

Thanks in advance!

 

 

 

 

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PetrS
NXP TechSupport
NXP TechSupport

Hi,

this is because you got overflows (or several one) when using timebase running from 160MHz clock. Not sure how ICU driver support overflows, seems not. You should set timebase with respect of input signal. Try to increase prescaler of timebase (emios2 ch23), then you shoul dget right result too.

BR, Petr  

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874件の閲覧回数
PetrS
NXP TechSupport
NXP TechSupport

Hi,

this is because you got overflows (or several one) when using timebase running from 160MHz clock. Not sure how ICU driver support overflows, seems not. You should set timebase with respect of input signal. Try to increase prescaler of timebase (emios2 ch23), then you shoul dget right result too.

BR, Petr  

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zp001
Contributor III

Hi Petr,

Thank you for you reply!

I just tried to to increase prescaler of ICU channel frequency, after prescaler, the current input channel of reference clock is 40000Hz, the result is right.

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