According to the NXP S32 Reference Manual, I followed the steps to inject a RAM error:
Enabled the SRAM0 channel.
Configured the EICHD0_WORDm[CHKBIT_MASK] and EICHD0_WORDm[Ba_bDATA_MASK] fields for the channel used to inject the error.
Programmed the EICHEN register to enable the corresponding injection channel.
Set the EIMCR[GEIEN] bit to globally enable all configured error injection channels.
To create a multi-bit error, I inverted two bits in either the CHKBIT_MASK or DATA_MASK fields of the EICHDn_WORD registers.
After that, I configured the ERM (Error Reporting Module) to monitor error status. However, when I checked the ERM_SR0 register after performing the multi-bit injection, I did not see any error status reported.
Could you please help me understand how to detect the multi-bit error status correctly? I have already enabled the ERM module clock. Is there anything else that needs to be configured?
Also, as per the reference manual, ECC is enabled by default for both RAM and ROM. Is that correct?
Note: I don't want to use any external drivers like SPD or SAF for RAM checking
During startup i am performing SRAM memory initialization
Could u help how can i do RAM and ROM checks without Drivers (SPD and SAF)
